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SN74ALVC16374DL PDF预览

SN74ALVC16374DL

更新时间： 2024-11-08 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
11页 192K
描述
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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中文翻译

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SN74ALVC16374DL 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：0.300 INCH, PLASTIC, SSOP-48针数：48
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.43
Is Samacsys：N其他特性：TYP VOLP < 0.8V AT VCC = 3.3V, TA = 25 DEGREE C
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G48
长度：15.875 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.024 A位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP48,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
传播延迟（tpd）：5.9 ns认证状态：Not Qualified
座面最大高度：2.79 mm子类别：FF/Latches
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.3 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：7.5 mm
Base Number Matches：1

SN74ALVC16374DL 数据手册

 浏览型号SN74ALVC16374DL的Datasheet PDF文件第2页浏览型号SN74ALVC16374DL的Datasheet PDF文件第3页浏览型号SN74ALVC16374DL的Datasheet PDF文件第4页浏览型号SN74ALVC16374DL的Datasheet PDF文件第5页浏览型号SN74ALVC16374DL的Datasheet PDF文件第6页浏览型号SN74ALVC16374DL的Datasheet PDF文件第7页 
SN74ALVC16374  
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SCAS258A – JANUARY 1993 – REVISED MAY 1995  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1CLK  
1D1  
1D2  
GND  
1D3  
1D4  
2
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
3
= 3.3 V, T = 25°C  
CC  
A
4
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
5
= 3.3 V, T = 25°C  
A
6
Bus Hold On Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
7
V
V
CC  
CC  
8
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
1D5  
1D6  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
ESD Protection Exceeds 2000 V Per  
MIL-STD-833C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
Latch-Up Performance Exceeds 250 mA  
Per JEDEC Standard JESD-17  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
2D5  
2D6  
GND  
2D7  
2D8  
2CLK  
description  
This 16-bit edge-triggered D-type flip-flop is  
designed for 3.3-V V  
2.5-V, 2.7-V, and 3.3-V V  
operation; it is tested at  
CC  
.
CC  
The SN74ALVC16374 is particularly suitable  
for implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On  
the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the  
data(D)inputs. OE)canbeusedtoplacetheeightoutputsineitheranormallogicstate(high-orlow-logiclevels)  
or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines  
significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without  
need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data can be  
retained or new data can be entered while the outputs are in the high-impedance state.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVC16374 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)  
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the  
same printed-circuit-board area.  
The SN74ALVC16374 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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SN74ALVC16374DL 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVCH16374DLR TI

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74ALVCH16374DLG4 TI

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SN74ALVCH16374DL TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVC16409 TI

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SN74ALVC16409DGG TI

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SN74ALVC16409DGGR TI

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 		ALVC/VCX/A SERIES, 9-BIT EXCHANGER, TRUE OUTPUT, PDSO56, 0.300 INCH, PLASTIC, TSSOP-56
SN74ALVC16409DL TI

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 		9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER WITH 3-STATE OUTPUTS
SN74ALVC16409DLR TI

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 		9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER WITH 3-STATE OUTPUTS
SN74ALVC164245 TI

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 		16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVC164245_07 TI

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 		16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVC164245_08 TI

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 		16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVC164245DGG TI

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 		16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS

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