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SN74ALVC16409

更新时间： 2024-09-16 12:22:31
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
11页 189K
描述
9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER WITH 3-STATE OUTPUTS

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SN74ALVC16409 数据手册

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SCAS259A − NOVEMBER 1993 − REVISED JULY 1995  
DGG OR DL PACKAGE  
(TOP VIEW)  
D EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
D Member of the Texas Instruments  
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PRE  
SEL0  
1A1  
GND  
1A2  
CLK  
SELEN  
1B1  
GND  
1B2  
Widebus+Family  
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D UBE (Universal Bus Exchanger) Allows  
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Synchronous Data Exchange  
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D Designed to Facilitate Incident-Wave  
Switching for Line Impedances of 50 Ω  
or Greater  
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1A3  
1B3  
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CC  
CC  
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D Typical V  
(Output Ground Bounce)  
1A4  
1A5  
1A6  
GND  
1A7  
1A8  
1A9  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B4  
1B5  
1B6  
GND  
1B7  
1B8  
1B9  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
OLP  
< 0.8 V at V  
= 3.3 V, T = 25°C  
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CC  
A
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D Typical V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
> 2 V at V  
= 3.3 V, T = 25°C  
A
D ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
D Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D Latch-Up Performance Exceeds 250 mA  
Per JEDEC Standard JESD-17  
D Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
2A7  
2A8  
GND  
2A9  
SEL1  
SEL2  
2B7  
2B8  
GND  
2B9  
SEL4  
SEL3  
description  
The SN74ALVC16409 allows synchronous data  
exchange between four different buses.  
Data flow is controlled by the select (SEL0−SEL4) inputs. A data-flow state is stored on the rising edge of the  
clock (CLK) input if the select-enable (SELEN) input is low. Once a data-flow state has been established, data  
is stored in the flip-flop on the rising edge of CLK if SELEN is high.  
The data-flow control logic is designed to allow glitch-free data transmission.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVC16409 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)  
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the  
same printed-circuit-board area.  
The SN74ALVC16409 is characterized for operation from −40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus+, EPIC, and UBE are trademarks of Texas Instruments Incorporated.  
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Copyright 1995, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567...11

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SN74ALVC16409DGGR TI

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 		9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER WITH 3-STATE OUTPUTS
SN74ALVC16409DLR TI

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SN74ALVC164245 TI

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 		16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
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 		16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVC164245_08 TI

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 		16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVC164245DGG TI

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 		16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVC164245DGGR TI

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 		16-BIT 2.5-V 3.3-V 3.3V TO 5-V LEVEL-SHIFTING TRANSCEIVER
SN74ALVC164245DGGT TI

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 		16-BIT 2.5-V 3.3-V 3.3V TO 5-V LEVEL-SHIFTING TRANSCEIVER

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