SN54LVTH244A, SN74LVTH244A
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCAS586E – DECEMBER 1996 – REVISED APRIL 1999
SN54LVTH244A . . . J OR W PACKAGE
SN74LVTH244A . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
V
CC
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
2OE
1Y1
2A4
1Y2
2A3
1Y3
)
CC
Support Unregulated Battery Operation
Down to 2.7 V
Typical V
< 0.8 V at V
(Output Ground Bounce)
OLP
= 3.3 V, T = 25°C
CC
A
13 2A2
12 1Y4
11 2A1
I
and Power-Up 3-State Support Hot
off
Insertion
GND 10
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
SN54LVTH244A . . . FK PACKAGE
(TOP VIEW)
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
3
2
1 20 19
18
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
17
16
15
14
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Packages, and Ceramic
(J) DIPs
9 10 11 12 13
description
These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) V operation, but with the
CC
capability to provide a TTL interface to a 5-V system environment.
The ’LVTH244A devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When
OE is low, the devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When V is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
CC
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
through a pullup resistor;
CC
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry
off
off
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54LVTH244A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVTH244A is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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