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SN54LVTH374_08

更新时间： 2024-11-20 05:04:55
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德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
18页 642K
描述
3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN54LVTH374_08 数据手册

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SCBS683H − MARCH 1997 − REVISED OCTOBER 2003  
SN54LVTH374 . . . J OR W PACKAGE  
SN74LVTH374 . . . DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
D
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
3.3-V V  
)
CC  
D
D
D
D
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OLP  
CC  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
= 3.3 V, T = 25°C  
A
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
CLK  
Support Unregulated Battery Operation  
Down to 2.7 V  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
GND  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
SN54LVTH374 . . . FK PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
description/ordering information  
3
2
1 20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
4
5
6
7
8
These octal flip-flops are designed specifically for  
17  
16  
15  
low-voltage (3.3-V) V  
operation, but with the  
CC  
capability to provide a TTL interface to a  
5-V system environment.  
14 6D  
9 10 11 12 13  
The eight flip-flops of the ’LVTH374 devices are  
edge-triggered D-type flip-flops. On the positive  
transition of the clock (CLK) input, the Q outputs  
are set to the logic levels set up at the data (D)  
inputs.  
ORDERING INFORMATION  
ORDERABLE  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PART NUMBER  
SN74LVTH374DW  
SN74LVTH374DWR  
SN74LVTH374NSR  
SN74LVTH374DBR  
SN74LVTH374PW  
SN74LVTH374PWR  
SNJ54LVTH374J  
Tube  
SOIC − DW  
LVTH374  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
LVTH374  
LXH374  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
LXH374  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC - FK  
SNJ54LVTH374J  
SNJ54LVTH374W  
SNJ54LVTH374FK  
−55°C to 125°C  
Tube  
SNJ54LVTH374W  
SNJ54LVTH374FK  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
ꢏ ꢛ ꢜ ꢝ ꢞꢟ ꢠꢡ ꢢꢣ ꢡꢞ ꢤꢜ ꢥꢦ ꢧꢛ ꢢ ꢢꢞ ꢨꢕ ꢄꢌ ꢗꢔ ꢘ ꢌꢈꢩꢂ ꢈꢂꢊ ꢧꢥꢥ ꢜꢧ ꢝ ꢧ ꢤꢪ ꢢꢪꢝ ꢣ ꢧ ꢝ ꢪ ꢢꢪ ꢣꢢꢪ ꢟ  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...18

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