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SN54LVTH573WR PDF预览

SN54LVTH573WR

更新时间: 2024-11-20 20:08:23
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理输出元件逻辑集成电路
页数 文件大小 规格书
24页 1065K
描述
LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, DFP-20

SN54LVTH573WR 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:20
Reach Compliance Code:unknown风险等级:5.39
其他特性:BROADSIDE VERSION OF 373系列:LVT
JESD-30 代码:R-GDFP-F20长度:13.09 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
最大电源电流(ICC):5 mA传播延迟(tpd):5.4 ns
认证状态:Not Qualified座面最大高度:2.54 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:MILITARY
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL宽度:6.92 mm
Base Number Matches:1

SN54LVTH573WR 数据手册

 浏览型号SN54LVTH573WR的Datasheet PDF文件第2页浏览型号SN54LVTH573WR的Datasheet PDF文件第3页浏览型号SN54LVTH573WR的Datasheet PDF文件第4页浏览型号SN54LVTH573WR的Datasheet PDF文件第5页浏览型号SN54LVTH573WR的Datasheet PDF文件第6页浏览型号SN54LVTH573WR的Datasheet PDF文件第7页 
SN54LVTH573, SN74LVTH573  
3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCBS687H − MAY 1997 − REVISED SEPTEMBER 2003  
D
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
3.3-V V  
)
CC  
D
D
D
Support Unregulated Battery Operation  
Down to 2.7 V  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
Typical V  
(Output Ground Bounce)  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
OLP  
<0.8 V at V = 3.3 V, T = 25°C  
CC  
A
I
off  
and Power-Up 3-State Support Hot  
Insertion  
SN74LVTH573 . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVTH573 . . . J OR W PACKAGE  
SN74LVTH573 . . . DB, DW, NS,  
OR PW PACKAGE  
SN54LVTH573 . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
20  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
VCC  
1Q  
18 2Q  
17 3Q  
16 4Q  
1
2
3
4
5
6
7
8
9
10  
20  
19  
3
2
1
20 19  
18  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
2Q  
3Q  
4Q  
5Q  
6Q  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
17  
16  
15  
14  
15  
14  
13  
12  
11  
5Q  
6Q  
7Q  
8Q  
LE  
9 10 11 12 13  
10  
11  
GND  
description/ordering information  
ORDERING INFORMATION  
ORDERABLE  
T
A
PACKAGE  
TOP-SIDE MARKING  
PART NUMBER  
SN74LVTH573RGYR  
SN74LVTH573DW  
SN74LVTH573DWR  
SN74LVTH573NSR  
SN74LVTH573DBR  
SN74LVTH573PW  
SN74LVTH573PWR  
SN74LVTH573GQNR  
SN74LVTH573ZQNR  
SNJ54LVTH573J  
QFN − RGY  
SOIC − DW  
Tape and reel  
Tube  
LXH573  
LVTH573  
LVTH573  
LVTH573  
LXH573  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
SSOP − DB  
−40°C to 85°C  
TSSOP − PW  
LXH573  
LXH573  
Tape and reel  
VFBGA − GQN  
VFBGA − ZQN (Pb-free)  
CDIP − J  
Tape and reel  
Tube  
Tube  
Tube  
SNJ54LVTH573J  
SNJ54LVTH573W  
SNJ54LVTH573FK  
−55°C to 125°C  
CFP − W  
SNJ54LVTH573W  
SNJ54LVTH573FK  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available  
at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright © 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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