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SN54LVTH574-SP PDF预览

SN54LVTH574-SP

更新时间: 2024-11-21 11:07:07
品牌 Logo 应用领域
德州仪器 - TI 驱动触发器总线驱动器总线收发器
页数 文件大小 规格书
23页 744K
描述
具有三态输出的 3.3V ABT 八路边沿 D 类触发器

SN54LVTH574-SP 数据手册

 浏览型号SN54LVTH574-SP的Datasheet PDF文件第2页浏览型号SN54LVTH574-SP的Datasheet PDF文件第3页浏览型号SN54LVTH574-SP的Datasheet PDF文件第4页浏览型号SN54LVTH574-SP的Datasheet PDF文件第5页浏览型号SN54LVTH574-SP的Datasheet PDF文件第6页浏览型号SN54LVTH574-SP的Datasheet PDF文件第7页 
ꢊ ꢋꢊ ꢌꢅ ꢍꢎꢆ ꢏ ꢐꢆꢍꢄ ꢑꢒ ꢓꢑ ꢌꢆꢔ ꢕꢓ ꢓꢑ ꢔꢑꢒ ꢒꢌꢆ ꢖꢗ ꢑ ꢘ ꢄꢕ ꢗ ꢌꢘ ꢄꢏ ꢗ  
SCBS688G − MAY 1997 − REVISED SEPTEMBER 2003  
D
D
D
D
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
)
CC  
Support Unregulated Battery Operation  
Down to 2.7 V  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
A
I
and Power-Up 3-State Support Hot  
off  
Insertion  
SN54LVTH574 . . . FK PACKAGE  
(TOP VIEW)  
SN74LVTH574 . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVTH574 . . . J OR W PACKAGE  
SN74LVTH574 . . . DB, DW, NS,  
OR PW PACKAGE  
(TOP VIEW)  
1
20  
3
2
1 20 19  
18  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
1Q  
2Q  
3Q  
17  
16  
15  
14  
16 4Q  
15 5Q  
9 10 11 12 13  
14  
13  
12  
11  
6Q  
7Q  
8Q  
CLK  
10  
11  
GND  
description/ordering information  
These octal flip-flops are designed specifically for low-voltage (3.3-V) V  
provide a TTL interface to a 5-V system environment.  
operation, but with the capability to  
CC  
ORDERING INFORMATION  
ORDERABLE  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PART NUMBER  
SN74LVTH574RGYR  
SN74LVTH574DW  
SN74LVTH574DWR  
SN74LVTH574NSR  
SN74LVTH574DBR  
SN74LVTH574PW  
SN74LVTH574PWR  
SN74LVTH574GQNR  
SN74LVTH574ZQNR  
SNJ54LVTH574J  
QFN − RGY  
SOIC − DW  
Tape and reel  
Tube  
LXH574  
LVTH574  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
LVTH574  
LXH574  
SSOP − DB  
−40°C to 85°C  
TSSOP − PW  
LXH574  
LXH574  
Tape and reel  
VFBGA − GQN  
Tape and reel  
VFBGA − ZQN (Pb-free)  
CDIP − J  
Tube  
Tube  
Tube  
SNJ54LVTH574J  
SNJ54LVTH574W  
SNJ54LVTH574FK  
CFP − W  
SNJ54LVTH574W  
SNJ54LVTH574FK  
−55°C to 125°C  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢏ ꢜ ꢧ ꢟ ꢞꢪ ꢥꢤ ꢢꢣ ꢤꢞ ꢠꢧ ꢩꢛ ꢡꢜ ꢢ ꢢꢞ ꢰꢕ ꢄꢌ ꢗꢔ ꢘ ꢌꢊꢱꢂ ꢊꢂꢉ ꢡꢩꢩ ꢧꢡ ꢟ ꢡ ꢠꢦ ꢢꢦꢟ ꢣ ꢡ ꢟ ꢦ ꢢꢦ ꢣꢢꢦ ꢪ  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢯ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢋ  
ꢥ ꢜꢩ ꢦꢣꢣ ꢞ ꢢꢫꢦ ꢟ ꢭꢛ ꢣꢦ ꢜ ꢞꢢꢦ ꢪꢋ ꢏ ꢜ ꢡꢩ ꢩ ꢞ ꢢꢫꢦ ꢟ ꢧꢟ ꢞ ꢪꢥꢤ ꢢꢣ ꢉ ꢧꢟ ꢞ ꢪꢥꢤ ꢢꢛꢞ ꢜ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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