SN54LV123AFKR

更新时间： 2024-11-27 13:13:47

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德州仪器 - TI		触发器输入元件
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SN54LV123AFKR 数据手册

SN54LV123A, SN74LV123A

DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS

WITH SCHMITT-TRIGGER INPUTS

SCLS393A – APRIL 1998 – REVISED DECEMBER 1999

SN54LV123A . . . J OR W PACKAGE

SN74LV123A . . . D, DB, DGV, NS, OR PW PACKAGE

(TOP VIEW)

EPIC (Enhanced-Performance Implanted

CMOS) Process

Schmitt-Trigger Circuitry on A, B, and CLR

Inputs for Slow Input Transition Rates

1R /C

Edge Triggered From Active-High or

Active-Low Gated Logic Inputs

ext ext

1CLR

ext

Retriggerable for Very Long Output Pulses,

up to 100% Duty Cycle

12 2Q

2CLR

ext

Overriding Clear Terminates Output Pulse

Glitch-Free Power-Up Reset on Outputs

2R /C

ext ext

GND

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

SN54LV123A . . . FK PACKAGE

(TOP VIEW)

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Package Options Include Plastic

Small-Outline (D, NS), Shrink Small-Outline

(DB), Thin Very Small-Outline (DGV), and

Thin Shrink Small-Outline (PW) Packages,

Ceramic Flat (W) Packages, Chip Carriers

(FK), and DIPs (J)

1 20 19

1CLR

ext

15 2Q

9 10 11 12 13

2CLR

ext

description

The ’LV123A devices are dual retriggerable

monostable multivibrators designed for 2-V to

5.5-V V

operation.

These edge-triggered multivibrators feature

output pulse-duration control by three methods. In

the first method, the A input is low and the B input

goes high. In the second method, the B input is

high and the A input goes low. In the third method,

the A input is low, the B input is high, and the clear

(CLR) input goes high.

NC – No internal connection

The output pulse duration is programmable by selecting external resistance and capacitance values. The

external timing capacitor must be connected between C and R /C (positive) and an external resistor

ext

ext ext

connected between R /C

and V . To obtain variable pulse durations, connect an external variable

ext ext

resistance between R /C and V . The output pulse duration can also be reduced by taking CLR low.

ext ext

Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input

pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition

rates with jitter-free triggering at the outputs.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...14

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与SN54LV123AFKR相关器件

型号	品牌	获取价格	描述	数据表
SN54LV123AJ	TI	获取价格	DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS
SN54LV123AW	TI	获取价格	DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS
SN54LV123AWR	TI	获取价格	TTL/H/L SERIES, DUAL MONOSTABLE MULTIVIBRATOR, CDFP16, CERAMIC, DFP-16
SN54LV125	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN54LV125A	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN54LV125A_07	TI	获取价格	QUADRUPLE BUS BUFFER GATES
SN54LV125A_10	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN54LV125AFK	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN54LV125AJ	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN54LV125AW	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

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