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SiRB40DP PDF预览

SiRB40DP

更新时间: 2024-11-22 14:52:35
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威世 - VISHAY /
页数 文件大小 规格书
13页 350K
描述
Dual N-Channel 40 V (D-S) MOSFET

SiRB40DP 数据手册

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SiRB40DP  
Vishay Siliconix  
www.vishay.com  
Dual N-Channel 40 V (D-S) MOSFET  
FEATURES  
PRODUCT SUMMARY  
• TrenchFET® Gen IV power MOSFET  
• Tuned for the lowest RDS-Qoss FOM  
• Qgd/Qgs ratio < 1 optimizes switching characteristics  
• 100 % Rg and UIS tested  
VDS (V)  
RDS(on) () MAX.  
0.00325 at VGS = 10 V  
0.00420 at VGS = 4.5 V  
ID (A) a, g Qg (TYP.)  
40  
40  
29.5 nC  
40  
PowerPAK® SO-8 Dual  
• Material categorization: for definitions of compliance  
please see www.vishay.com/doc?99912  
D1  
D1  
7
8
D2  
6
D2  
5
APPLICATIONS  
D
1
D
2
• DC/DC converters  
• DC/AC inverters  
1
S1  
• Synchronous rectification  
• Battery and load switch  
G
G
2
1
2
3
S2  
G1  
1
4
G2  
Top View  
Bottom View  
S
1
S
2
Ordering Information:  
SiRB40DP-T1-GE3 (lead (Pb)-free and halogen-free)  
N-Channel  
MOSFET  
N-Channel  
MOSFET  
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
40  
V
A
VGS  
+20, -16  
40 g  
40 g  
24.4 b, c  
19.8 b, c  
100  
T
C = 25 °C  
C = 70 °C  
T
Continuous Drain Current (TJ = 150 °C)  
ID  
TA = 25 °C  
TA = 70 °C  
Pulsed Drain Current (t = 100 μs)  
IDM  
IS  
TC = 25 °C  
30 g  
3.1 b, c  
Continuous Source-Drain Diode Current  
TA = 25 °C  
Single Pulse Avalanche Current  
Single Pulse Avalanche Energy  
IAS  
25  
L = 0.1 mH  
EAS  
31.25  
46.2  
mJ  
W
T
C = 25 °C  
C = 70 °C  
T
29.6  
Maximum Power Dissipation  
PD  
TA = 25 °C  
TA = 70 °C  
3.5 b, c  
2.3 b, c  
-55 to +150  
260  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak temperature) d, e  
TJ, Tstg  
°C  
THERMAL RESISTANCE RATINGS  
PARAMETER  
Maximum Junction-to-Ambient b, f  
SYMBOL  
RthJA  
TYPICAL  
25  
MAXIMUM  
UNIT  
t 10 s  
35  
°C/W  
Maximum Junction-to-Case (Drain)  
Steady State  
RthJC  
2.2  
2.7  
Notes  
a. Based on TC = 25 °C.  
b. Surface mounted on 1" x 1" FR4 board.  
c. t = 10 s.  
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper  
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not  
required to ensure adequate bottom side solder interconnection.  
e. Rework conditions: Manual soldering with a soldering iron is not recommended for leadless components.  
f. Maximum under steady state conditions is 80 °C/W.  
g. Package limited.  
S16-1324-Rev. A, 04-Jul-16  
Document Number: 68578  
1
For technical questions, contact: pmostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  

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