Datasheet > PDM4M4110S15M

PDM4M4110S15M

更新时间： 2024-01-28 12:49:23

品牌	Logo	应用领域
IXYS		静态存储器
页数	文件大小	规格书
10页	215K
描述
SRAM Module, 512KX32, 15ns, CMOS, SIMM-72

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技术参数
数据手册

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PDM4M4110S15M 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SIMM
包装说明：	,	针数：	72
Reach Compliance Code：	compliant	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.65
Base Number Matches：	1

PDM4M4110S15M 数据手册

PRELIMINARY

PDM4M4110

DC Electrical Characteristics (V = 5.0V ± 10%, T = 0°C to +70°C)

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

Input Leakage Current

(Address and Control)

= Max.,V = V to V

—

µA

Input Leakage Current

(Data)

= Max., V = V to V

—

µA

Output Leakage Current

= V to V , V = Max.,

SS CC CC

OUT

CS = V

Output Low Voltage

Output High Voltage

Input High Voltage

Input Low Voltage

= 8 mA, V = Min.

—

0.4

—

= –4 mA, V = Min.

2.4

2.2

6.0

0.8

(1)

–0.5

NOTE 1. V = –2.0V for pulse widths less than 10 ns, once per cycle.

Power Supply Characteristics

(1)

Symbol

Parameter

Max

Unit

Operating Current

680

160

CS = V , V = Max., f = f , Outputs Open

MAX

Standby Current

CS ≥ V , V = Max., f = f , Outputs Open

MAX

Full Standby Current CS ≥ V – 0.2V,

SB1

f = 0, V > V – 0.2V or < 0.2V

NOTE 1. Preliminary speciﬁcation only.

Capacitance⁽¹⁾(T = +25°C, f = 1.0 MHz)

Symbol

Parameter

Input Capacitance, (Data) V = 0V

Max.

Unit

IN(D)

IN(A)

OUT

Input Capacitance, (Address and Control) V = 0V

Input Capacitance, V

= 0V

OUT

NOTE 1. This parameter is determined by device characteristics but is not production tested.

8-68

Rev 2.3 - 1/15/96

1 2 345 6 7...10

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