MOSFET - Power, Single
N-Channel, SO8-FL
25 V, 0.68 mW, 365 A
NTMFS0D8N02P1E
Features
• Small Footprint (5x6mm) for Compact Design
www.onsemi.com
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
Compliant
0.68 mW @ 10 V
0.80 mW @ 4.5 V
25 V
365 A
Applications
• DC−DC Converters
• Power Load Switch
• Notebook Battery Management
D (5−8)
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
Unit
V
V
DSS
25
G (4)
Gate−to−Source Voltage
V
GS
+16/
−12
V
S (1,2,3)
N−CHANNEL MOSFET
Continuous Drain
Current R
T
= 25°C
=85°C
= 25°C
I
365
263
139
A
C
D
q
JC
T
Steady
(Note 1)
C
C
State
Power Dissipation
T
P
W
A
D
D
D
MARKING
DIAGRAMS
D
R
(Note 1)
q
JC
Continuous Drain
Current R
T = 25°C
A
I
D
55
40
q
JA
S
S
S
D
D
T = 85°C
A
Steady
State
(Notes 1, 3)
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
2EFN
AYWZZ
Power Dissipation
T = 25°C
A
P
3.2
W
A
R
(Notes 1, 3)
q
JA
G
1
D
Continuous Drain
Current R
T = 25°C
A
I
D
30
21
q
JA
2EFN = Specific Device Code
T = 85°C
A
Steady
State
(Notes 2, 3)
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceabililty
Power Dissipation
T = 25°C
A
P
0.93
W
R
(Notes 2, 3)
q
JA
Pulsed Drain Current T = 25°C, t = 10 ms
I
DM
762
666
A
A
p
Single Pulse Drain−to−Source Avalanche
Energy (I = 115.4 A , L = 0.1 mH) (Note 4)
E
AS
mJ
L
pk
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
Operating Junction and Storage Temperature
Range
T , T
−55 to
+150
°C
°C
J
STG
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
260
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1. Surface−mounted on FR4 board using 1 in pad size, 2 oz Cu pad.
2. Surface−mounted on FR4 board using minimum pad size, 2 oz Cu pad.
3. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted. Actual continuous current will be limited by thermal & electro−mechanical
application board design. R
is determined by the user’s board design.
AS
q
JC
4. 100% UIS tested at L = 1 mH, I = 30.7 A.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
April, 2021 − Rev. 1
NTMFS0D8N02P1E/D