DATA SHEET
www.onsemi.com
MOSFET - Power, Single
N-Channel, Logic Level,
SO8FL
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
0.9 mW @ 10 V
1.5 mW @ 4.5 V
40 V
278 A
40 V, 0.9 mW, 278 A
D (5)
NTMFS0D9N04XL
Features
G (4)
• Low R
to Minimize Conduction Loss
• Low Q with Soft Recovery to Minimize E Loss and Voltage
DS(on)
RR
RR
S (1,2,3)
N−CHANNEL MOSFET
Spike
• Low Q and Capacitance to Minimize Driving and Switching Loss
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MARKING
DIAGRAM
Typical Applications
S
S
S
G
DFN5 (SO−8FL)
CASE 488AA
• High Switching Frequency DC−DC Conversion
• Synchronous Rectification
0D9N4L
AYWZZ
1
D
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
0D9N4L = Specific Device Code
Parameter
Drain−to−Source Voltage
Symbol
Value
40
Unit
V
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceabililty
V
DSS
Gate−to−Source Voltage
DC
V
GS
20
V
Continuous Drain Current
(Note 2)
T
= 25°C
= 100°C
= 25°C
= 100°C
= 25°C,
I
278
196
136
68
A
C
C
C
D
T
C
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
Power Dissipation (Note 2)
T
P
W
A
D
T
C
Pulsed Drain Current
T
I
1193
1193
DM
t = 100 ms
p
Pulsed Source Current
(Body Diode)
I
SM
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
°C
J
STG
Source Current (Body Diode)
I
207
273
A
S
Single Pulse Avalanche Energy (I = 74 A)
(Note 3)
E
AS
mJ
PK
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1. Surface−mounted on FR4 board using 1 in pad size, 1 oz Cu pad.
2. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
3. E of 273 mJ is based on started T = 25°C, I = 74 A, V = 32 V,
AS
GS
q
J
AS
DD
V
4. R
= 10 V, 100% avalanche tested.
Thermal Resistance − Junction to Case Top = 20 °C/W.
JCT
© Semiconductor Components Industries, LLC, 2023
1
Publication Order Number:
June, 2023 − Rev. 2
NTMFS0D9N04XL/D