MC74HC165A
8-Bit Serial or
Parallel-Input/
Serial-Output Shift Register
High−Performance Silicon−Gate CMOS
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MARKING
The MC74HC165A is identical in pinout to the LS165. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
DIAGRAMS
16
This device is an 8−bit shift register with complementary outputs
from the last stage. Data may be loaded into the register either in
parallel or in serial form. When the Serial Shift/Parallel Load input is
low, the data is loaded asynchronously in parallel. When the Serial
Shift/Parallel Load input is high, the data is loaded serially on the
rising edge of either Clock or Clock Inhibit (see the Function Table).
The 2−input NOR clock may be used either by combining two
independent clock sources or by designating one of the clock inputs to
act as a clock inhibit.
PDIP−16
N SUFFIX
CASE 648
MC74HC165AN
AWLYYWWG
16
16
1
1
16
SOIC−16
D SUFFIX
CASE 751B
HC165AG
AWLYWW
1
1
Features
16
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
TSSOP−16
DT SUFFIX
CASE 948F
HC
165A
ALYWG
G
16
1
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
1
• In Compliance with the Requirements Defined by JEDEC Standard
QFN16
MN SUFFIX
CASE 485AW
165A
ALYWG
G
No. 7 A
• Chip Complexity: 286 FETs or 71.5 Equivalent Gates
1
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
A
=
Assembly Lo-
cation
L, WL
Y, YY
W, WW
G or G
=
=
=
Wafer Lot
Year
Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
October, 2014 − Rev. 9
MC74HC165A/D