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NLV74HC157ADTR2G

更新时间： 2024-11-06 01:16:43
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
7页 117K
描述
Quad 2-Input Data Selectors/Multiplexers

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NLV74HC157ADTR2G 数据手册

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MC74HC157A  
Quad 2-Input Data  
Selectors/Multiplexers  
High−Performance Silicon−Gate CMOS  
The MC74HC157A is identical in pinout to the LS157. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
This device routes 2 nibbles (A or B) to a single port (Y) as  
determined by the Select input. The data is presented at the outputs in  
noninverted form. A high level on the Output Enable input sets all four  
Y outputs to a low level.  
SOIC−16  
D SUFFIX  
CASE 751B  
TSSOP−16  
DT SUFFIX  
CASE 948F  
Features  
PIN ASSIGNMENT  
• Output Drive Capability: 10 LSTTL Loads  
• Outputs Directly Interface to CMOS, NMOS, and TTL  
• Operating Voltage Range: 2.0 to 6.0 V  
• Low Input Current: 1.0 mA  
SELECT  
A0  
1
2
16  
15  
V
CC  
OUTPUT  
ENABLE  
B0  
Y0  
A1  
B1  
3
4
5
6
14 A3  
13 B3  
12 Y3  
11 A2  
• High Noise Immunity Characteristic of CMOS Devices  
• In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
Y1  
7
8
10 B2  
• Chip Complexity: 82 FETs or 20.5 Equivalent Gates  
• NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
GND  
9
Y2  
MARKING DIAGRAMS  
16  
1
16  
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
HC  
Compliant  
HC157AG  
AWLYWW  
157A  
ALYWG  
G
1
2
A0  
SOIC−16  
TSSOP−16  
5
A1  
NIBBLE  
A
= Assembly Location  
= Wafer Lot  
11  
A INPUTS  
4
7
A2  
A3  
L, WL  
Y, YY  
Y0  
Y1  
Y2  
Y3  
14  
= Year  
W, WW = Work Week  
DATA  
9
G or G  
= Pb−Free Package  
3
6
OUTPUTS  
B0  
B1  
B2  
B3  
12  
(Note: Microdot may be in either location)  
NIBBLE  
10  
13  
FUNCTION TABLE  
Inputs  
B INPUTS  
PIN 16 = V  
CC  
PIN 8 = GND  
Output  
Outputs  
1
Enable Select Y0 − Y3  
SELECT  
H
L
L
X
L
H
L
15  
OUTPUT  
ENABLE  
A0−A3  
B0−B3  
X = don’t care  
Figure 1. Logic Diagram  
A0−A3, B0−B3 = the levels of  
the respective Data−Word  
Inputs.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
August, 2014 − Rev. 12  
MC74HC157A/D  
1234567

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