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NB6L11DG PDF预览

NB6L11DG

更新时间: 2024-11-30 03:20:51
品牌 Logo 应用领域
安森美 - ONSEMI 时钟
页数 文件大小 规格书
12页 212K
描述
2.5 V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator

NB6L11DG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:End Of Life零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:7.8
其他特性:NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V系列:6L
输入调节:DIFFERENTIALJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:1
功能数量:1反相输出次数:
端子数量:8实输出次数:2
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:+-2.5/+-3.3 VProp。Delay @ Nom-Sup:0.22 ns
传播延迟(tpd):0.2 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.015 ns座面最大高度:1.75 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.9 mm
Base Number Matches:1

NB6L11DG 数据手册

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NB6L11  
2.5 V/3.3 V Multilevel Input to  
Differential LVPECL/LVNECL  
1:2 Clock or Data  
Fanout Buffer/Translator  
http://onsemi.com  
MARKING  
The NB6L11 is an enhanced differential 1:2 clock or data fanout  
buffer/translator. The device has the same pinout and is functionally  
equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the  
device is optimized for the systems that require LOW skew, LOW  
jitter and LOW power consumption.  
DIAGRAMS*  
8
Differential input can be configured to accept singleended signal  
by applying an external reference voltage to unused complementary  
input pin. Input accept LVNECL, LVPECL, LVTTL, LVCMOS,  
CML, or LVDS. The outputs are 800 mV ECL signals.  
8
6L11  
ALYW G  
1
G
SO8  
1
D SUFFIX  
CASE 751  
Features  
8
Maximum Input Clock Frequency w 6 GHz Typical  
Maximum Input Data Rate w 6 Gb/s Typical  
Low 14 mA Typical Power Supply Current  
150 ps Typical Propagation Delay  
8
6L11  
1
ALYW G  
TSSOP8  
DT SUFFIX  
CASE 948R  
G
1
5 ps Typical Within Device Skew  
75 ps Typical Rise/Fall Times  
PECL Mode Operating Range:  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
V
CC  
= 2.375 V to 3.465 V with V = 0 V  
EE  
NECL Mode Op rating Range:  
= 0 V with V = 2.375 V to 3.465 V  
(Note: Microdot may be in either location)  
V
CC  
EE  
Open Input Default State  
Q Outputs Will Default LOW with Inputs Open or at V  
*For additional marking information, refer to  
Application Note AND8002/D.  
EE  
LVDS, LVPECL, LVNECL, LCMOS, LVTTL and CML Input  
Compatible  
PbFree Packages are Available  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 Rev. 6  
NB6L11/D  

NB6L11DG 替代型号

型号 品牌 替代类型 描述 数据表
NB6L11DR2G ONSEMI

完全替代

2.5 V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer
NB6L11DR2 ONSEMI

完全替代

2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1:2 CLOCK OR DATA FANOUT BUFFER
NB6L11D ONSEMI

类似代替

2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1:2 CLOCK OR DATA FANOUT BUFFER

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