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MT90223AG2

更新时间： 2024-02-11 12:48:47
品牌 Logo 应用领域
加拿大卓联 - ZARLINK ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
页数 文件大小 规格书
155页 895K
描述
4/8/16 Port IMA/TC PHY Device

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MT90223AG2 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：BGA, BGA384,26X26,40Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.84
应用程序：ATMJESD-30 代码：S-PBGA-B384
JESD-609代码：e1长度：27 mm
湿度敏感等级：3功能数量：1
端子数量：384最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA384,26X26,40
封装形状：SQUARE封装形式：GRID ARRAY
峰值回流温度（摄氏度）：NOT SPECIFIED电源：2.5,3.3,5 V
认证状态：Not Qualified座面最大高度：2.28 mm
子类别：ATM/SONET/SDH ICs最大压摆率：0.425 mA
标称供电电压：2.5 V表面贴装：YES
电信集成电路类型：ATM/SONET/SDH NETWORK INTERFACE温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：27 mm
Base Number Matches：1

MT90223AG2 数据手册

 浏览型号MT90223AG2的Datasheet PDF文件第1页浏览型号MT90223AG2的Datasheet PDF文件第3页浏览型号MT90223AG2的Datasheet PDF文件第4页浏览型号MT90223AG2的Datasheet PDF文件第5页浏览型号MT90223AG2的Datasheet PDF文件第6页浏览型号MT90223AG2的Datasheet PDF文件第7页 
MT90222/3/4  
Data Sheet  
General  
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Supports unframed serial streams up to 10 Mb/s per T1/E1 or DSL link  
Single chip ATM IMA & TC processor  
Versatile TDM interface for most popular T1 or E1 framers and DSL chipsets  
Up to 6 MT90222/3/4 devices can be spanned using a TDM ring supporting 32 links  
Provides 8 & 16-bit UTOPIA Level 1 & 2 compatible MPHY Interface (MT90222/3/4 slaved to ATM device)  
16-bit microprocessor interface for Intel or Motorola  
JTAG test support  
2.5 V core, 3.3 V I/O with 5 V tolerant inputs  
384 pin PGBA with 1.0 mm pitch balls  
MT90222, MT90223 & MT90224 share the same product package and pin-out configuration  
Applications  
Provides cost effective solutions to implement IMA and/or TC functions over T1, E1, J1 or DSL transport facilities in  
broadband access networks. Typical applications are for trunking or subscriber access in:  
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Integrated multi-service access platforms  
Access multiplexers  
Next-generation DLC  
Wireless local loop  
3G wireless base-stations  
Preamble  
The MT90222, MT90223 and MT90224 form a family of similar devices, differing mainly in the maximum number of  
serial links, and are collectively referred to as MT90222/3/4. It should be noted throughout this document whenever  
reference is made to the number of serial links that the MT90224 offers a maximum of 16 serial links (links 15:0),  
while the MT90223 offers a maximum of 8 serial links (links 14,12,10,8,6,4,2 and 0), and the MT90222 offers a  
maximum of 4 serial links (links 12, 8, 4 and 0). Pin and register compatibility has been maintained to offer  
interchangeability.  
Note: When creating IMA groups for MT90222 the groups 0, 1, 2 and 3 should be used.  
Description  
The MT90222/3/4 device is targeted to systems implementing the ATM FORUM Inverse Multiplexing for ATM (IMA  
version 1.1 and 1.0) or UNI specifications for T1/E1 rates. In the MT90222/3/4 architecture, up to 16 physical and  
independent serial links can be terminated through the utilization of off-the-shelf, traditional T1/E1/J1 framers/LIUs  
and DSL chip sets. The MT90222/3/4 device can also provide up to 10 Mb/s per link data rates for unframed serial  
TDM transmissions for xDSL applications.  
The MT90222/3/4 device provides ATM system designers with a flexible architecture when implementing ATM  
access over existing trunk interfaces, allowing a migration towards ATM service technology. In addition to the  
design of ATM UNI specifications for T1/E1 rates, the MT90222/3/4 device is compliant with the ATM FORUM IMA  
specifications for controlling IMA groups of up to 16 trunks in a single chip. The MT90222/3/4 can be configured to  
operate in different modes to facilitate the implementation of the IMA function at both CPE and Central Office sites.  
For systems targeting ATM over T1/E1 with IMA and TC operating simultaneously, the MT90222/3/4 device  
provides the ideal architecture and capabilities.  
2
Zarlink Semiconductor Inc.  
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