是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | DIP, DIP14,.3 | Reach Compliance Code: | unknown |
风险等级: | 5.92 | JESD-30 代码: | R-PDIP-T14 |
JESD-609代码: | e0 | 逻辑集成电路类型: | J-K FLIP-FLOP |
功能数量: | 2 | 端子数量: | 14 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装等效代码: | DIP14,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 电源: | 2/6 V |
认证状态: | Not Qualified | 子类别: | FF/Latches |
表面贴装: | NO | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | THROUGH-HOLE | 端子节距: | 2.54 mm |
端子位置: | DUAL | 触发器类型: | NEGATIVE EDGE |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
MC74HC107DD | MOTOROLA |
获取价格 |
暂无描述 |
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MC74HC107DR2 | MOTOROLA |
获取价格 |
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, |
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MC74HC107N | MOTOROLA |
获取价格 |
Dual J-K Flip-Flop with Reset |
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MC74HC107ND | MOTOROLA |
获取价格 |
暂无描述 |
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MC74HC107NS | MOTOROLA |
获取价格 |
暂无描述 |
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MC74HC109D | MOTOROLA |
获取价格 |
Dual J-K Flip-Flop with Set and Reset |
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MC74HC109DDR2 | MOTOROLA |
获取价格 |
HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, |
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MC74HC109DDS | MOTOROLA |
获取价格 |
J-K Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, PDSO16 |
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MC74HC109DR2 | MOTOROLA |
获取价格 |
HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, |
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MC74HC109DS | MOTOROLA |
获取价格 |
J-K Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, PDSO16 |
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