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MC74HC107NS PDF预览

MC74HC107NS

更新时间: 2024-01-25 14:00:39
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 触发器
页数 文件大小 规格书
5页 174K
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MC74HC107NS 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC74HC107 is identical in pinout to the LS107. The device inputs are  
compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
N SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
14  
Each flip flops negative edge clocked and has an active–low asynchro-  
nous reset.  
1
The HC107 is identical in function to the HC73, but has a different pinout.  
D SUFFIX  
SOIC PACKAGE  
CASE 751A–03  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
14  
1
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
ORDERING INFORMATION  
MC74HCXXXN  
MC74HCXXXD  
Plastic  
SOIC  
Chip Complexity: 92 FETs or 23 Equivalent Gates  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
J1  
1
2
14  
13  
V
CC  
Q1  
RESET 1  
1
J1  
3
2
3
4
12  
11  
Q1  
K1  
CLOCK 1  
K2  
Q1  
Q1  
12  
4
CLOCK 1  
Q2  
Q2  
5
6
10  
9
RESET 2  
CLOCK 2  
K1  
13  
RESET 1  
GND  
7
8
J2  
8
9
J2  
CLOCK 2  
K2  
5
6
Q2  
Q2  
11  
10  
FUNCTION TABLE  
Inputs  
Reset Clock  
Outputs  
RESET 2  
J
K
Q
Q
PIN 14 = V  
CC  
PIN 7 = GND  
L
X
X
L
L
H
H
X
X
X
X
L
H
L
H
X
X
X
L
H
H
H
H
H
H
H
H
No Change  
L
H
H
L
Toggle  
L
H
No Change  
No Change  
No Change  
10/95  
REV 6  
Motorola, Inc. 1995  

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