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MC74HC10A

更新时间: 2024-11-18 11:07:59
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
8页 144K
描述
Triple 3-Input NAND Gate High−Performance Silicon−Gate CMOS

MC74HC10A 数据手册

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MC74HC10A  
Triple 3-Input NAND Gate  
HighPerformance SiliconGate CMOS  
The MC74HC10A is identical in pinout to the LS10. The device  
inputs are compatible with Standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
Features  
MARKING  
DIAGRAMS  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2 to 6 V  
14  
1
PDIP14  
N SUFFIX  
CASE 646  
Low Input Current: 1 mA  
MC74HC10AN  
AWLYYWWG  
14  
High Noise Immunity Characteristic of CMOS Devices  
1
In Compliance With the Requirements Defined JEDEC  
Standard No. 7 A  
Chip Complexity: 36 FETs or 9 Equivalent Gates  
PbFree Packages are Available  
14  
SOIC14  
D SUFFIX  
HC10AG  
14  
AWLYWW  
CASE 751A  
1
1
LOGIC DIAGRAM  
1
A1  
14  
2
12  
B1  
C1  
Y1  
Y2  
Y3  
TSSOP14  
DT SUFFIX  
CASE 948G  
HC  
10A  
ALYW  
13  
14  
1
3
4
5
A2  
B2  
C2  
6
Y = ABC  
1
A
= Assembly Location  
= Wafer Lot  
9
A3  
B3  
C3  
WL, L  
YY, Y  
10  
11  
8
= Year  
WW, W = Work Week  
G or = PbFree Package  
PIN 14 = V  
CC  
PIN 7 = GND  
(Note: Microdot may be in either location)  
PIN ASSIGNMENT  
FUNCTION TABLE  
A1  
B1  
1
2
14  
13 C1  
12  
V
CC  
Inputs  
Output  
Y
A
B
A2  
B2  
3
4
Y1  
L
L
L
H
L
H
H
H
L
11 C3  
10 B3  
C2  
Y2  
5
6
H
H
H
9
8
A3  
Y3  
GND  
7
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
December, 2009 Rev. 1  
MC74HC10A/D  

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