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MC74HC10AD PDF预览

MC74HC10AD

更新时间: 2024-01-28 12:23:09
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
页数 文件大小 规格书
5页 137K
描述
Triple 3-Input NAND Gate

MC74HC10AD 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.68逻辑集成电路类型:AND GATE
Base Number Matches:1

MC74HC10AD 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC74HC10A is identical in pinout to the LS10. The device inputs are  
compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
N SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
14  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
D SUFFIX  
SOIC PACKAGE  
CASE 751A–03  
14  
1
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
DT SUFFIX  
TSSOP PACKAGE  
CASE 948G–01  
14  
Chip Complexity: 36 FETs or 9 Equivalent Gates  
1
LOGIC DIAGRAM  
ORDERING INFORMATION  
MC74HCXXAN  
MC74HCXXAD  
MC74HCXXADT  
Plastic  
SOIC  
TSSOP  
1
A1  
2
12  
6
B1  
C1  
Y1  
Y2  
Y3  
13  
3
4
5
A2  
B2  
C2  
PIN ASSIGNMENT  
Y = ABC  
A1  
B1  
1
2
14  
13  
V
CC  
C1  
9
A3  
B3  
C3  
A2  
B2  
3
4
12  
11  
Y1  
C3  
10  
11  
8
C2  
Y2  
5
6
10  
9
B3  
A3  
PIN 14 = V  
CC  
PIN 7 = GND  
GND  
7
8
Y3  
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
C
L
X
X
H
X
L
X
H
X
X
L
H
H
H
L
H
This document contains information on a new product. Specifications and information herein are subject to  
change without notice.  
12/97  
REV 0  
Motorola, Inc. 1997  

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