5秒后页面跳转
MC14094BCP PDF预览

MC14094BCP

更新时间: 2024-11-03 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 移位寄存器存储触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
8页 235K
描述
8-Stage Shift/Store Register with Three-State Outputs

MC14094BCP 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.41
计数方向:RIGHT系列:4000/14000/40000
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
长度:19.175 mm逻辑集成电路类型:SERIAL IN PARALLEL OUT
最大频率@ Nom-Sup:1250000 Hz位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):235
电源:5/15 V传播延迟(tpd):840 ns
认证状态:Not Qualified座面最大高度:4.44 mm
子类别:Shift Registers标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:3 MHzBase Number Matches:1

MC14094BCP 数据手册

 浏览型号MC14094BCP的Datasheet PDF文件第2页浏览型号MC14094BCP的Datasheet PDF文件第3页浏览型号MC14094BCP的Datasheet PDF文件第4页浏览型号MC14094BCP的Datasheet PDF文件第5页浏览型号MC14094BCP的Datasheet PDF文件第6页浏览型号MC14094BCP的Datasheet PDF文件第7页 
The MC14094B combines an 8–stage shift register with a data latch  
for each stage and a three–state output from each latch.  
Data is shifted on the positive clock transition and is shifted from the  
http://onsemi.com  
seventh stage to two serial outputs. The Q output data is for use in  
S
high–speed cascaded systems. The Qoutput data is shifted on the  
following negative clock transition for use in low–speed cascaded  
systems.  
Data from each stage of the shift register is latched on the negative  
transition of the strobe input. Data propagates through the latch while  
strobe is high.  
S
MARKING  
DIAGRAMS  
16  
PDIP–16  
P SUFFIX  
CASE 648  
MC14094BCP  
AWLYYWW  
Outputs of the eight data latches are controlled by three–state  
buffers which are placed in the high–impedance state by a logic Low  
on Output Enable.  
1
16  
1
SOIC–16  
D SUFFIX  
CASE 751B  
Three–State Outputs  
14094B  
AWLYWW  
Capable of Driving Two Low–Power TTL Loads or One Low–Power  
Schottky TTL Load Over the Rated Temperature Range  
Input Diode Protection  
16  
Data Latch  
Dual Outputs for Data Out on Both Positive and  
Negative Clock Transitions  
TSSOP–16  
DT SUFFIX  
CASE 948F  
14  
094B  
ALYW  
Useful for Serial–to–Parallel Data Conversion  
1
Pin–for–Pin Compatible with CD4094B  
16  
1
SOEIAJ–16  
F SUFFIX  
CASE 966  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
MC14094B  
AWLYWW  
SS  
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
V , V  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
in out  
DD  
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
P
D
Power Dissipation,  
per Package (Note 3.)  
500  
mW  
ORDERING INFORMATION  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
Device  
Package  
PDIP–16  
SOIC–16  
SOIC–16  
TSSOP–16  
Shipping  
A
T
stg  
MC14094BCP  
MC14094BD  
2000/Box  
48/Rail  
T
Lead Temperature  
(8–Second Soldering)  
L
MC14094BDR2  
MC14094BDT  
2500/Tape & Reel  
96/Rail  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
MC14094BDTR2 TSSOP–16 2500/Tape & Reel  
MC14094BF SOEIAJ–16 See Note 1.  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
1. For ordering information on the EIAJ version of the  
SOIC packages, please contact your local ON  
Semiconductor representative.  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14094B/D  

MC14094BCP 替代型号

型号 品牌 替代类型 描述 数据表
NLV14094BDR2G ONSEMI

完全替代

8-Stage Shift/Store Register with Three-State Outputs
CD4094BF3A TI

类似代替

CMOS 8-Stage Shift-and-Store Nus Register
MC14094BCPG ONSEMI

类似代替

8−Stage Shift/Store Register with Three−State Outputs

与MC14094BCP相关器件

型号 品牌 获取价格 描述 数据表
MC14094BCPD MOTOROLA

获取价格

4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, P
MC14094BCPDS MOTOROLA

获取价格

4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, P
MC14094BCPG ONSEMI

获取价格

8−Stage Shift/Store Register with Three−State Outputs
MC14094BD MOTOROLA

获取价格

8-Stage Shift/Store Register with Three-State Outputs
MC14094BD ONSEMI

获取价格

8-Stage Shift/Store Register with Three-State Outputs
MC14094BDG ONSEMI

获取价格

8−Stage Shift/Store Register with Three−State Outputs
MC14094BDR2 ONSEMI

获取价格

8-Stage Shift/Store Register with Three-State Outputs
MC14094BDR2G ONSEMI

获取价格

8−Stage Shift/Store Register with Three−State Outputs
MC14094BDT ONSEMI

获取价格

8-Stage Shift/Store Register with Three-State Outputs
MC14094BDTR2 ONSEMI

获取价格

8-Stage Shift/Store Register with Three-State Outputs