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MC10ELT28MNR4 PDF预览

MC10ELT28MNR4

更新时间: 2024-11-30 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI 转换器
页数 文件大小 规格书
9页 143K
描述
5 V TTL to Differential PECL and Differential PECL to TTL Translator

MC10ELT28MNR4 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DFN
包装说明:HVSON, SOLCC8,.08,20针数:8
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.23
最大延迟:5.5 ns接口集成电路类型:PECL-TTL/TTL-PECL TRANSLATOR
JESD-30 代码:S-XDSO-N8JESD-609代码:e0
长度:2 mm位数:1
功能数量:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出锁存器或寄存器:NONE输出极性:COMPLEMENTARY
封装主体材料:UNSPECIFIED封装代码:HVSON
封装等效代码:SOLCC8,.08,20封装形状:SQUARE
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):240
电源:5 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Level Translators
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:2 mm
Base Number Matches:1

MC10ELT28MNR4 数据手册

 浏览型号MC10ELT28MNR4的Datasheet PDF文件第2页浏览型号MC10ELT28MNR4的Datasheet PDF文件第3页浏览型号MC10ELT28MNR4的Datasheet PDF文件第4页浏览型号MC10ELT28MNR4的Datasheet PDF文件第5页浏览型号MC10ELT28MNR4的Datasheet PDF文件第6页浏览型号MC10ELT28MNR4的Datasheet PDF文件第7页 
MC10ELT28, MC100ELT28  
5 VꢀTTL to Differential  
PECL and Differential PECL  
to TTL Translator  
Description  
http://onsemi.com  
MARKING DIAGRAMS*  
The MC10ELT/100ELT28 is a differential PECL to TTL translator  
and a TTL to differential PECL translator in a single package. Because  
PECL (Positive ECL) levels are used, only +5 V and ground are  
required. The small outline 8-lead package and the dual translation  
design of the ELT28 makes it ideal for applications which are sending  
and receiving signals across a backplane.  
8
8
8
HLT28  
ALYW  
G
KLT28  
ALYW  
G
1
The 100 Series contains temperature compensation.  
SOIC8  
D SUFFIX  
CASE 751  
1
1
Features  
3.5 ns Typical PECL to TTL Propagation Delay  
1.2 ns Typical TTL to PECL Propagation Delay  
PNP TTL Inputs for Minimal Loading  
24 mA TTL Outputs  
Flow Through Pinouts  
Operating Range V = 4.75 V to 5.25 V with GND= 0 V  
8
8
1
8
1
HT28  
KT28  
ALYWG  
ALYWG  
TSSOP8  
DT SUFFIX  
CASE 948R  
G
G
1
CC  
Q  
Q  
Output Will Default High with Inputs Left Open or < 1.3 V  
Output Will Default High with Inputs Left Open  
TTL  
ECL  
Internal PECL Input Pulldown Resistors  
PbFree Packages are Available  
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
A
L
= Assembly Location  
= Wafer Lot  
5G = MC10  
2V = MC100  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
M
= Date Code  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 9  
MC10ELT28/D  

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