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MC10E221FNR2 PDF预览

MC10E221FNR2

更新时间： 2024-10-31 20:38:15
品牌 Logo 应用领域
安森美 - ONSEMI 驱动输出元件逻辑集成电路
页数 文件大小 规格书
10页 106K
描述
10E SERIES, LOW SKEW CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28, PLASTIC, LCC-28

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MC10E221FNR2 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCJ,针数：28
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.92其他特性：NECL MODE: VCC=0 WITH VEE= -4.2V TO -5.7V
系列：10E输入调节：DIFFERENTIAL MUX
JESD-30 代码：S-PQCC-J28JESD-609代码：e0
长度：11.505 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
功能数量：1反相输出次数：
端子数量：28实输出次数：6
最高工作温度：85 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED传播延迟（tpd）：1.125 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.075 ns
座面最大高度：4.57 mm最大供电电压 (Vsup)：5.7 V
最小供电电压 (Vsup)：4.2 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：ECL
温度等级：OTHER端子面层：TIN LEAD
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：11.505 mmBase Number Matches：1

MC10E221FNR2 数据手册

 浏览型号MC10E221FNR2的Datasheet PDF文件第2页浏览型号MC10E221FNR2的Datasheet PDF文件第3页浏览型号MC10E221FNR2的Datasheet PDF文件第4页浏览型号MC10E221FNR2的Datasheet PDF文件第5页浏览型号MC10E221FNR2的Datasheet PDF文件第6页浏览型号MC10E221FNR2的Datasheet PDF文件第7页 
MC10E211, MC100E211  
5VꢀECL 1:6 Differential  
Clock Distribution Chip  
The MC10E/100E211 is a low skew 1:6 fanout device designed  
explicitly for low skew clock distribution applications.  
The E211 features a multiplexed clock input to allow for the  
distribution of a lower speed scan or test clock along with the high speed  
system clock. When LOW (or left open in which case it will be pulled  
LOW by the input pulldown resistor) the SEL pin will select the  
differential clock input.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Both a common enable and individual output enables are provided.  
When asserted the positive output will go LOW on the next negative  
transition of the CLK (or SCLK) input. The enabling function is  
synchronous so that the outputs will only be enabled/disabled when the  
outputs are already in the LOW state. In this way the problem of runt  
pulse generation during the disable operation is avoided. Note that the  
internal flip flop is clocked on the falling edge of the input clock edge,  
therefore all associated specifications are referenced to the negative  
edge of the CLK input.  
128  
MC10E211FN  
AWLYYWW  
PLCC−28  
FN SUFFIX  
CASE 776  
128  
The output transitions of the E211 are faster than the standard  
ECLinPS edge rates. This feature provides a means of distributing  
higher frequency signals than capable with the E111 device. Because of  
these edge rates and the tight skew limits guaranteed in the  
specification, there are certain termination guidelines which must be  
followed. For more details on the recommended termination schemes  
please refer to the applications information section of this data sheet.  
MC100E211FN  
AWLYYWW  
A
= Assembly Location  
The V  
pin, an internally generated voltage supply, is available to  
BB  
WL  
YY  
WW  
= Wafer Lot  
= Year  
= Work Week  
this device only. For single−ended input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
BB  
V
V
may also rebias AC coupled inputs. When used, decouple V and  
BB  
CC  
BB  
via a 0.01 mF capacitor and limit current sourcing or sinking to  
should be left open.  
0.5 mA. When not used, V  
BB  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
The 100 Series contains temperature compensation.  
dimensions section on page 511 of this data sheet.  
• Guaranteed Low Skew Specification  
• Synchronous Enabling/Disabling  
• Multiplexed Clock Inputs  
• V Output for Single−Ended Use  
BB  
• Common and Individual Enable/Disable Control  
• High Bandwidth Output Transistors  
• PECL Mode Operating Range: V  
= 4.2 V to 5.7 V with V = 0 V  
CC  
EE  
• NECL Mode Operating Range: V = 0 V with V = −4.2 V to −5.7 V  
CC  
EE  
• Internal Input 75 kW Pulldown Resistors  
• ESD Protection: Human Body Model; > 2 kV,  
Machine Model; > 100 V  
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
• Moisture Sensitivity Level 1  
For Additional Information, see Application Note AND8003/D  
• Flammability Rating: UL 94 V−0 @ 0.125 in,  
Oxygen Index: 28 to 34  
• Transistor Count = 457 devices  
Semiconductor Components Industries, LLC, 2004  
503  
Publication Order Number:  
March, 2004 − Rev. 8  
MC10E211/D  
1234567...10

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