SEMICONDUCTOR TECHNICAL DATA
The MC10E404/100E404 is a 4-bit differential AND/NAND device. The
differential operation of the device makes it ideal for pulse shaping
applications where duty cycle skew is critical. Special design techniques
were incorporated to minimize the skew between the upper and lower
level gate inputs.
Because a negative 2-input NAND function is equivalent to a 2-input
OR function, the differential inputs and outputs of the device also allow for
its use as a fully differential 2 input OR/NOR function.
QUAD DIFFERENTIAL
AND/NAND
The output RISE/FALL times of this device are significantly faster than
most other standard ECLinPS devices resulting in an increased
bandwidth.
The differential inputs have clamp structures which will force the Q
output of a gate in an open input condition to go to a LOW state. Thus,
inputs of unused gates can be left open and will not affect the operation of
the rest of the device. Note that the input clamp will take affect only if both
inputs fall 2.5V below V
.
CC
• Differential D and Q
• 700ps Max. Propagation Delay
• High Frequency Outputs
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
• Extended 100E V
Range of – 4.2V to – 5.46V
• Internal 75kΩ Input Pulldown Resistors
EE
D a D a D b D b
V
Q
Q
3
3
3
3
3
CCO
21
3
25
24
23
22
20
19
18
D b
26
27
28
1
Q
Q
V
2
2
LOGIC DIAGRAM
D b
2
17
16
15
14
13
12
2
D a
2
D a
0
CC
Q
Q
0
D a
Pinout: 28-Lead PLCC
0
V
Q
EE
1
1
0
0
D b
0
(Top View)
0
D b
0
D a
2
2
Q
Q
Q
D b
1
3
D a
1
Q
Q
1
D a
1
D b
4
1
D b
1
1
D b
1
5
6
7
8
9
10
11
D a
2
D a D a D b D b D a D a
V
CCO
1
1
0
0
0
0
Q
Q
2
D a
2
* All V
CC
and V
pins are tied together on the die.
CCO
D b
2
2
D b
2
PIN NAMES
D a
3
Pin
Function
Differential Data Inputs
Differential Data Outputs
Q
Q
3
D a
3
D[0:4], D[0:4]
Q[0:4], Q[0:4]
D b
3
3
D b
3
FUNCTION TABLE
Da
Db
Q
Da
Db
Q
L
L
H
H
L
H
L
L
L
L
L
L
H
H
L
H
L
L
H
H
H
H
H
H
12/93
Motorola, Inc. 1996
REV 2
2–1