Datasheet > MC10121_02

MC10121_02

更新时间： 2024-11-26 04:59:43

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
8页	108K
描述
4-Wide OR-AND/OR-AND Gate

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中文翻译

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数据手册

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MC10121_02 数据手册

MC10121

4-Wide OR-AND/OR-AND

Gate

The MC10121 is a basic logic building block providing the

simultaneous OR–AND/OR–AND–Invert function, useful in data

control and digital multiplexing applications.

http://onsemi.com

• P = 100 mW typ/pkg (No Load)

• t = 2.3 ns typ

MARKING

DIAGRAMS

• t , t = 2.5 ns typ (20%–80%)

LOGIC DIAGRAM

CDIP–16

L SUFFIX

CASE 620

MC10121L

AWLYYWW

PDIP–16

P SUFFIX

CASE 648

MC10121P

AWLYYWW

= PIN 1

= PIN 16

= PIN 8

CC1

PLCC–20

FN SUFFIX

CASE 775

10121

CC2

AWLYYWW

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

DIP

PIN ASSIGNMENT

CC2

CC1

ORDERING INFORMATION

OUT

Device

Package

Shipping

MC10121L

CDIP–16

25 Units / Rail

MC10121P

PDIP–16

PLCC–20

25 Units / Rail

46 Units / Rail

MC10121FN

A2 , A3

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

Semiconductor Components Industries, LLC, 2002

Publication Order Number:

January, 2002 – Rev. 7

MC10121/D

12 3 4 5 6 7 8

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与MC10121_02相关器件

型号	品牌	获取价格	描述	数据表
MC10121FN	ONSEMI	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121FN	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121FNR2	ONSEMI	获取价格	10K SERIES, 11-INPUT OR-AND/OR-AND-INVERT GATE, PQCC20, PLASTIC, LCC-20
MC10121L	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121L	ONSEMI	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121LD	MOTOROLA	获取价格	OR-AND/OR-AND-Invert Gate, ECL10K, CDIP16
MC10121LDS	MOTOROLA	获取价格	暂无描述
MC10121LS	MOTOROLA	获取价格	OR-AND/OR-AND-Invert Gate, ECL10K, CDIP16
MC10121P	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121P	ONSEMI	获取价格	4-Wide OR-AND/OR-AND Gate