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MC10121FN PDF预览

MC10121FN

更新时间: 2024-11-05 22:34:23
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极触发器逻辑集成电路输入元件
页数 文件大小 规格书
5页 105K
描述
4-Wide OR-AND/OR-AND Gate

MC10121FN 技术参数

生命周期:Transferred零件包装代码:QLCC
包装说明:QCCJ, LDCC20,.4SQ针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.65Is Samacsys:N
其他特性:3-3-3-3 INPUT系列:10K
JESD-30 代码:S-PQCC-J20JESD-609代码:e0
长度:8.965 mm逻辑集成电路类型:OR-AND/OR-AND-INVERT GATE
功能数量:1输入次数:11
端子数量:20最高工作温度:85 °C
最低工作温度:-30 °C输出特性:OPEN-EMITTER
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER电源:-5.2 V
最大电源电流(ICC):29 mAProp。Delay @ Nom-Sup:3.5 ns
传播延迟(tpd):3.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:4.57 mm
子类别:Gates表面贴装:YES
技术:ECL温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:8.965 mmBase Number Matches:1

MC10121FN 数据手册

 浏览型号MC10121FN的Datasheet PDF文件第2页浏览型号MC10121FN的Datasheet PDF文件第3页浏览型号MC10121FN的Datasheet PDF文件第4页浏览型号MC10121FN的Datasheet PDF文件第5页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10121 is a basic logic building block providing the simultaneous  
OR–AND/OR–AND–Invert function, useful in data control and digital multiplexing  
applications.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P
= 100 mW typ/pkg (No Load)  
= 2.3 ns typ  
D
t
pd  
t , t = 2.5 ns typ (20%–80%)  
r f  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
CASE 775–02  
LOGIC DIAGRAM  
4
5
6
7
9
DIP  
PIN ASSIGNMENT  
V
A
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
2
3
10  
A4  
A4  
A4  
A3  
IN  
IN  
IN  
IN  
OUT  
OUT  
11  
12  
13  
14  
15  
A
A1  
A1  
A1  
A2  
V
IN  
IN  
IN  
IN  
A3  
IN  
A2 , A3  
IN  
IN  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
A2  
IN  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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