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MC100EPT20MNR4G PDF预览

MC100EPT20MNR4G

更新时间: 2024-11-21 05:22:23
品牌 Logo 应用领域
安森美 - ONSEMI 转换器电平转换器驱动程序和接口锁存器接口集成电路
页数 文件大小 规格书
10页 141K
描述
3.3V LVTTL/LVCMOS to Differential LVPECL Translator

MC100EPT20MNR4G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:DFN包装说明:LEAD FREE, DFN-8
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.13
最大延迟:0.45 ns接口集成电路类型:TTL/CMOS TO PECL TRANSLATOR
JESD-30 代码:S-XDSO-N8长度:2 mm
湿度敏感等级:1位数:1
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出锁存器或寄存器:NONE输出极性:COMPLEMENTARY
封装主体材料:UNSPECIFIED封装代码:HVSSON
封装等效代码:SOLCC8,.08,20封装形状:SQUARE
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Level Translators
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Nickel/Gold/Palladium (Ni/Au/Pd)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:2 mm
Base Number Matches:1

MC100EPT20MNR4G 数据手册

 浏览型号MC100EPT20MNR4G的Datasheet PDF文件第2页浏览型号MC100EPT20MNR4G的Datasheet PDF文件第3页浏览型号MC100EPT20MNR4G的Datasheet PDF文件第4页浏览型号MC100EPT20MNR4G的Datasheet PDF文件第5页浏览型号MC100EPT20MNR4G的Datasheet PDF文件第6页浏览型号MC100EPT20MNR4G的Datasheet PDF文件第7页 
MC10EPT20, MC100EPT20  
3.3VꢀLVTTL/LVCMOS to  
Differential LVPECL  
Translator  
The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL  
translator. Because PECL (Positive ECL) levels are used, only +3.3 V  
and ground are required. The small outline SOIC8 package and the  
single gate of the EPT20 makes it ideal for those applications where  
space, performance, and low power are at a premium.  
http://onsemi.com  
MARKING DIAGRAMS*  
The 100 Series contains temperature compensation.  
8
1
8
8
HPT20  
ALYW  
G
KPT20  
ALYW  
G
Features  
1
SO8  
390 ps Typical Propagation Delay  
Maximum Input Clock Frequency > 1 GHz Typical  
1
D SUFFIX  
CASE 751  
Operating Range V = 3.0 V to 3.6 V  
CC  
with GND = 0 V  
8
1
8
8
PNP TTL Input for Minimal Loading  
Q Output will Default HIGH with Input Open  
PbFree Packages are Available  
1
HA20  
KA20  
ALYWG  
ALYWG  
TSSOP8  
DT SUFFIX  
CASE 948R  
G
G
1
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
A
L
= Assembly Location  
= Wafer Lot  
5W = MC10  
3Q = MC100  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
M
= Date Code  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 9  
MC10EPT20/D  

MC100EPT20MNR4G 替代型号

型号 品牌 替代类型 描述 数据表
MC10EPT20MNR4G ONSEMI

完全替代

3.3V LVTTL/LVCMOS to Differential LVPECL Translator
MC100EPT20MNR4 ONSEMI

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3.3V LVTTL/LVCMOS to Differential LVPECL Translator

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