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MC100EPT21DG

更新时间： 2024-11-20 04:34:19

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
8页	84K
描述
3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator

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中文翻译

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替代型号

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MC100EPT21DG 数据手册

MC100EPT21

3.3VꢀDifferential

LVPECL/LVDS/CML to

LVTTL/LVCMOS Translator

The MC100EPT21 is a Differential LVPECL/LVDS/CML to

LVTTL/LVCMOS translator. Because LVPECL (Positive ECL),

LVDS, and positive CML input levels and LVTTL/LVCMOS output

levels are used, only +3.3 V and ground are required. The small

outline 8−lead SOIC package makes the EPT21 ideal for applications

which require the translation of a clock or data signal.

http://onsemi.com

MARKING

DIAGRAMS*

The V

output allows this EPT21 to be cap coupled in either

SO−8

D SUFFIX

CASE 751

single−ended or differential input mode. When single−ended cap

coupled, V output is tied to the D input and D is driven for a

KPT21

ALYW

non−inverting buffer, or V output is tied to the D input and D is

driven for an inverting buffer. When cap coupled differentially, V

output is connected through a resistor to each input pin. If used, the

pin should be bypassed to V via a 0.01 mF capacitor. For

additional information see AND8020/D. For a single−ended direct

connection use an external voltage reference source such as a resistor

TSSOP−8

DT SUFFIX

CASE 948R

KA21

ALYWG

divider. Do not use V for a single−ended direct connection or port to

another device.

Features

DFN8

MN SUFFIX

CASE 506AA

• 1.4 ns Typical Propagation Delay

• Maximum Frequency > 275 MHz Typical

• LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs

• 24 mA TTL outputs

= Assembly Location

= Wafer Lot

= Year

• Operating Range: V = 3.0 V to 3.6 V with GND = 0 V

• The 100 Series Contains Temperature Compensation

W = Work Week

M = Date Code

• V Output

= Pb−Free Package

• Pb−Free Packages are Available

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

December, 2006 − Rev. 15

MC100EPT21/D

12 3 4 5 6 7 8

中文翻译

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MC100EPT21DG 替代型号

型号	品牌	替代类型	描述	数据表
MC100ELT21DG	ONSEMI	类似代替	5 V Differential PECL to TTL Translator
MC100EPT21DR2G	ONSEMI	类似代替	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator

与MC100EPT21DG相关器件

型号	品牌	获取价格	描述	数据表
MC100EPT21DR2	ONSEMI	获取价格	Differential LVPECL to LVTTL Translator
MC100EPT21DR2G	ONSEMI	获取价格	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
MC100EPT21DT	ONSEMI	获取价格	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
MC100EPT21DTG	ONSEMI	获取价格	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
MC100EPT21DTR2	ONSEMI	获取价格	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
MC100EPT21DTR2G	ONSEMI	获取价格	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
MC100EPT21MNR4	ONSEMI	获取价格	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
MC100EPT21MNR4G	ONSEMI	获取价格	3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
MC100EPT22	ONSEMI	获取价格	Dual LVTTL/LVCMOS to Differential LVPECL Translator
MC100EPT22_06	ONSEMI	获取价格	3.3V Dual LVTTL/LVCMOS to Differential LVPECL to Differential LVPECL

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