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MB81F64842D-102FN PDF预览

MB81F64842D-102FN

更新时间: 2024-09-17 14:53:07
品牌 Logo 应用领域
富士通 - FUJITSU 时钟动态存储器光电二极管内存集成电路
页数 文件大小 规格书
45页 716K
描述
Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54

MB81F64842D-102FN 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP54,.46,32
针数:54Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.29Is Samacsys:N
访问模式:FOUR BANK PAGE BURST最长访问时间:6 ns
最大时钟频率 (fCLK):100 MHzI/O 类型:COMMON
交错的突发长度:2,4,8JESD-30 代码:R-PDSO-G54
JESD-609代码:e0长度:22.22 mm
内存密度:67108864 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:8功能数量:1
端口数量:1端子数量:54
字数:8388608 words字数代码:8000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:8MX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP54,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified刷新周期:4096
座面最大高度:1.2 mm连续突发长度:1,2,4,8,FP
最大待机电流:0.001 A子类别:DRAMs
最大压摆率:0.18 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

MB81F64842D-102FN 数据手册

 浏览型号MB81F64842D-102FN的Datasheet PDF文件第2页浏览型号MB81F64842D-102FN的Datasheet PDF文件第3页浏览型号MB81F64842D-102FN的Datasheet PDF文件第4页浏览型号MB81F64842D-102FN的Datasheet PDF文件第5页浏览型号MB81F64842D-102FN的Datasheet PDF文件第6页浏览型号MB81F64842D-102FN的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-11053-1E  
MEMORY  
CMOS  
4 × 2 M × 8 BIT  
SYNCHRONOUS DYNAMIC RAM  
MB81F64842D-75/-102/-102L  
CMOS 4-Bank × 2,097,152-Word × 8 Bit  
Synchronous Dynamic Random Access Memory  
DESCRIPTION  
The Fujitsu MB81F64842D is a CMOS Synchronous Dynamic Random Access Memory (SDRAM) containing  
67,108,864 memory cells accessible in a 8-bit format. The MB81F64842D features a fully synchronous operation  
referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high  
performance and simple user interface coexistence. The MB81F64842D SDRAM is designed to reduce the  
complexity of using a standard dynamic RAM (DRAM) which requires many control signal timing constraints, and  
may improve data bandwidth of memory as much as 5 times more than a conventional DRAM.  
The MB81F64842D is ideally suited for workstations, personal computers, laser printers, high resolution graphic  
adapters/accelerators and other applications where an extremely large memory and bandwidth are required and  
where a simple interface is needed.  
PRODUCT LINE & FEATURES  
MB81F64842D  
Parameter  
Reference Value  
@66MHz(CL=2)  
-75  
-102/-102L  
CL - tRCD - tRP  
3 - 3 - 3 clk min.  
133 MHz max.  
10 ns min.  
2 - 2 - 2 clk min.  
100 MHz max.  
10 ns min.  
2 - 2 - 2 clk min.  
66 MHz max.  
15ns min.  
Clock Frequency  
CL = 2  
CL = 3  
CL = 2  
CL = 3  
Burst Mode Cycle Time  
7.5 ns min.  
6 ns max.  
10 ns min.  
10 ns min.  
8 ns max.  
6 ns max.  
Access Time from Clock  
Operating Current  
5.4 ns max.  
85 mA max.  
1 mA max.  
6 ns max.  
6 ns max.  
80 mA max.  
65 mA max.  
1 mA max.  
1 mA max.  
Power Down Mode Current (ICC2P)  
Self Refresh Current (ICC6)  
1 mA max.  
1 mA max.  
1 mA max./ 500 µA max.  
• Single +3.3 V Supply ±0.3 V tolerance  
LVTTL compatible I/O interface  
• 4 K refresh cycles every 64 ms  
• Four bank operation  
• Programmable burst type, burst length, and  
CAS latency  
• Auto-and Self-refresh (every 15.6 µs)  
• CKE power down mode  
• Burst read/write operation and burst  
read/single write operation capability  
• Output Enable and Input Data Mask  

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