Datasheet > MB81F643242C-70

MB81F643242C-70

更新时间： 2024-09-16 22:23:47

品牌	Logo	应用领域
富士通 - FUJITSU		/
页数	文件大小	规格书
56页	935K
描述
4 X 512 K X 32 BIT SYNCHRONOUS DYNAMIC RAM

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MB81F643242C-70 数据手册

FUJITSU SEMICONDUCTOR

DATA SHEET

ADVANCED INFO.

AE0.1E

MEMORY

CMOS

4 × 512 K × 32 BIT

SYNCHRONOUS DYNAMIC RAM

MB81F643242C-60/-70/-10

CMOS 4-Bank × 524,288-Word × 32 Bit

Synchronous Dynamic Random Access Memory

■ DESCRIPTION

The Fujitsu MB81F643242C is a CMOS Synchronous Dynamic Random Access Memory (SDRAM) containing

67,108,864 memory cells accessible in a 32-bit format. The MB81F643242C features a fully synchronous

operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which

enables high performance and simple user interface coexistence. The MB81F643242C SDRAM is designed to

reduce the complexity of using a standard dynamic RAM (DRAM) which requires many control signal timing

constraints, and may improve data bandwidth of memory as much as 5 times more than a conventional DRAM.

The MB81F643242C is ideally suited for workstations, personal computers, laser printers, high resolution graphic

adapters/accelerators and other applications where an extremely large memory and bandwidth are required and

where a simple interface is needed.

■ PRODUCT LINE & FEATURES

MB81F643242C

-70

Reference

Value@ 67 MHz,

CL=3

Parameter

CL - t^RCD- t^RP

-60

-10

CL = 2 2 - 2 - 2 clk min.

CL = 3 3 - 3 - 3 clk min.

167 MHz max.

2 - 2 - 2 clk min.

3 - 3 - 3 clk min.

143 MHz max.

10 ns min.

2 - 2 - 2 clk min.

3 - 3 - 3 clk min.

100 MHz max.

15 ns min.

2 - 2 - 2 clk min.

3 - 3 - 3 clk min.

67 MHz max.

20 ns min.

Clock Frequency

CL = 2

CL = 3

CL = 2

CL = 3

10 ns min.

6 ns min.

Burst Mode Cycle Time

7 ns min.

10 ns min.

15 ns min.

6 ns max.

7 ns max.

Access Time from Clock

Operating Current

5.5 ns max.

165 mA max.

5.5 ns max.

155 mA max.

7 ns max.

115 mA max.

100 mA max.

Power Down Mode Current (I^CC2P)

Self Refresh Current (I^CC6)

2 mA max.

• Single +3.3 V Supply ±0.3 V tolerance

• LVTTL compatible I/O interface

• 4 K refresh cycles every 64 ms

• Four bank operation

• Programmable burst type, burst length, and

CAS latency

• Auto-and Self-refresh (every 15.6 µs)

• CKE power down mode

• Burst read/write operation and burst

read/single write operation capability

• Output Enable and Input Data Mask

12 3 4 5 6 7...56

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与MB81F643242C-70相关器件

型号	品牌	获取价格	描述	数据表
MB81F64442B-103LFN	FUJITSU	获取价格	Synchronous DRAM, 16MX4, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842B-103EFN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842B-103FN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842B-103LFN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842B-10LFN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842C-102FN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842C-103FN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842D-102FN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81F64842D-102LFN	FUJITSU	获取价格	Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54
MB81G163222--10TQ	FUJITSU	获取价格	Synchronous Graphics RAM, 512KX32, 7ns, CMOS, PQFP100, PLASTIC, TQFP-100

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