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MAX5891EGK-D PDF预览

MAX5891EGK-D

更新时间: 2024-09-12 19:45:39
品牌 Logo 应用领域
美信 - MAXIM 转换器
页数 文件大小 规格书
15页 339K
描述
D/A Converter, 1 Func, Parallel, Word Input Loading, 0.011us Settling Time, 10 X 10 MM, 0.90 MM HEIGHT, MO-220, QFN-68

MAX5891EGK-D 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:10 X 10 MM, 0.90 MM HEIGHT, MO-220, QFN-68针数:68
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.41
最大模拟输出电压:1.1 V最小模拟输出电压:-1 V
转换器类型:D/A CONVERTER输入位码:OFFSET BINARY
输入格式:PARALLEL, WORDJESD-30 代码:S-XQCC-N68
JESD-609代码:e0长度:10 mm
最大线性误差 (EL):0.0058%湿度敏感等级:3
位数:16功能数量:1
端子数量:68最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC68,.4SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):245电源:1.8,3.3 V
认证状态:Not Qualified座面最大高度:0.9 mm
标称安定时间 (tstl):0.011 µs子类别:Other Converters
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

MAX5891EGK-D 数据手册

 浏览型号MAX5891EGK-D的Datasheet PDF文件第2页浏览型号MAX5891EGK-D的Datasheet PDF文件第3页浏览型号MAX5891EGK-D的Datasheet PDF文件第4页浏览型号MAX5891EGK-D的Datasheet PDF文件第5页浏览型号MAX5891EGK-D的Datasheet PDF文件第6页浏览型号MAX5891EGK-D的Datasheet PDF文件第7页 
19-3542; Rev 2; 2/06  
16-Bit, 600Msps, High-Dynamic-Performance  
DAC with LVDS Inputs  
General Description  
Features  
600Msps Output Update Rate  
The MAX5891 advanced 16-bit, 600Msps, digital-to-  
analog converter (DAC) meets the demanding perfor-  
mance requirements of signal synthesis applications  
found in wireless base stations and other communica-  
tions applications. Operating from 3.3V and 1.8V sup-  
plies, the MAX5891 DAC supports update rates of  
600Msps using high-speed LVDS inputs while consum-  
ing only 298mW of power and offers exceptional  
dynamic performance such as 80dBc spurious-free  
Low Noise Spectral Density: -163dBFS/Hz at  
f
= 36MHz  
OUT  
Excellent SFDR and IMD Performance  
SFDR = 80dBc at f  
SFDR = 71dBc at f  
= 30MHz (to Nyquist)  
= 130MHz (to Nyquist)  
OUT  
OUT  
IMD = -95dBc at f  
IMD = -70dBc at f  
= 30MHz  
OUT  
OUT  
= 130MHz  
dynamic range (SFDR) at f  
= 30MHz.  
ACLR = 73dB at f  
= 122.88MHz  
OUT  
OUT  
The MAX5891 utilizes a current-steering architecture that  
supports a 2mA to 20mA full-scale output current range,  
and produces -2dBm to -22dBm full-scale output signal  
levels with a double-terminated 50load. The MAX5891  
features an integrated 1.2V bandgap reference and con-  
trol amplifier to ensure high-accuracy and low-noise per-  
formance. A separate reference input (REFIO) allows for  
the use of an external reference source for optimum flexi-  
bility and improved gain accuracy.  
2mA to 20mA Full-Scale Output Current  
LVDS-Compatible Digital Inputs  
On-Chip 1.2V Bandgap Reference  
Low 298mW Power Dissipation at 600Msps  
Compact (10mm x 10mm) QFN-EP Package  
Evaluation Kit Available (MAX5891EVKIT)  
Ordering Information  
The MAX5891 digital inputs accept LVDS voltage lev-  
els, and the flexible clock input can be driven differen-  
tially or single-ended, AC- or DC-coupled. The  
MAX5891 is available in a 68-pin QFN package with an  
exposed paddle (EP) and is specified for the extended  
(-40°C to +85°C) temperature range.  
TEMP  
PIN-  
PKG  
PART  
RANGE  
PACKAGE  
CODE  
MAX5891EGK-D  
MAX5891EGK+D  
-40°C to +85°C  
-40°C to +85°C  
68 QFN-EP*  
68 QFN-EP*  
G6800-4  
G6800-4  
Refer to the MAX5890 and MAX5889 data sheets for pin-  
compatible 14-bit and 12-bit versions of the MAX5891.  
*EP = Exposed paddle.  
+ = Lead-free package.  
D = Dry pack.  
Functional Diagram  
Applications  
Base Stations: Single/Multicarrier UMTS,  
CDMA, GSM  
MAX5891  
Communications: Fixed Broadband Wireless  
Access, Point-to-Point Microwave  
OUTP  
D0–D15  
LVDS  
Direct Digital Synthesis (DDS)  
Cable Modem Termination Systems (CMTS)  
Automated Test Equipment (ATE)  
Instrumentation  
600MHz  
16-BIT DAC  
LVDS DATA  
RECEIVER  
INPUTS  
LATCH  
OUTN  
DACREF  
Selector Guide  
REFIO  
1.2V  
REFERENCE  
FSADJ  
CLKP  
RESOLUTION UPDATE RATE  
CLK  
INTERFACE  
PART  
LOGIC INPUT  
(BITS)  
(Msps)  
CLKN  
POWER  
DOWN  
PD  
MAX5889  
MAX5890  
MAX5891  
12  
14  
16  
600  
600  
600  
LVDS  
LVDS  
LVDS  
Pin Configuration appears at end of data sheet.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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