19-3631; Rev 1; 4/07
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
General Description
Features
= 61.44MHz (Single-Carrier
OUT
The MAX5894 programmable interpolating, modulating,
500Msps, dual digital-to-analog converter (DAC) offers
superior dynamic performance and is optimized for high-
performance wideband, single-carrier transmit applica-
tions. The device integrates a selectable 2x/4x/8x
interpolating filter, a digital quadrature modulator, and
dual 14-bit, high-speed DACs on a single integrated cir-
cuit. At 30MHz output frequency and 500Msps update
rate, the in-band SFDR is 86dBc while consuming 1.1W.
The device also delivers 73dB ACLR for two-carrier
WCDMA at a 61.44MHz output frequency.
♦ 74dB ACLR at f
WCDMA)
♦ Meets 3G UMTS, cdma2000®, GSM Spectral Masks
(f = 122MHz)
OUT
♦ Noise Spectral Density = -154dBFS/Hz at
= 16MHz
f
OUT
♦ 91dBc SFDR at Low-IF Frequency (10MHz)
♦ 88dBc SFDR at High-IF Frequency (50MHz)
♦ Low Power: 886mW (f
= 250MHz)
CLK
♦ User Programmable
The selectable interpolating filters allow lower input data
rates while taking advantage of the high DAC update
rates. These linear-phase interpolation filters ease
reconstruction filter requirements and enhance the
passband dynamic performance. Individual offset and
gain programmability allow the user to calibrate out local
oscillator (LO) feedthrough and sideband suppression
errors generated by analog quadrature modulators.
Selectable 2x, 4x, or 8x Interpolating Filters
< 0.01dB Passband Ripple
> 99dB Stopband Rejection
Selectable Real or Complex Modulator Operation
Selectable Modulator LO Frequency: OFF, f / 2
IM
or f / 4
IM
Selectable Output Filter: Lowpass or Highpass
Channel Gain and Offset Adjustment
The MAX5894 features a f / 4 digital image-reject
IM
♦ EV Kit Available (Order the MAX5894 EV Kit)
Ordering Information
PKG
modulator. This modulator generates a quadrature-mod-
ulated IF signal that can be presented to an analog I/Q
modulator to complete the upconversion process. A
second digital modulation mode allows the signal to be
PART
TEMP RANGE PIN-PACKAGE
CODE
frequency-translated with image pairs at f / 2 or f / 4.
IM
IM
MAX5894EGK-D -40°C to +85°C
MAX5894EGK+D -40°C to +85°C
68 QFN-EP*
68 QFN-EP*
G6800-4
G6800-4
The MAX5894 features a standard 1.8V CMOS, 3.3V tol-
erant data input bus for easy interface. A 3.3V SPI™ port
is provided for mode configuration. The programmable
modes include the selection of 2x/4x/8x interpolating fil-
D = Dry pack.
*EP = Exposed paddle.
+Denotes lead-free package.
ters, f / 2, f / 4 or no digital quadrature modulation
IM
IM
with image rejection, channel gain and offset adjustment,
and offset binary or two’s complement data interface.
Selector Guide
Pin-compatible 12- and 16-bit devices are also available.
Refer to the MAX5893 data sheet for the 12-bit version
and the MAX5895 data sheet for the 16-bit version.
RESOLUTION DAC UPDATE
INPUT
LOGIC
PART
(BITS)
RATE (Msps)
MAX5893
MAX5894
MAX5895
MAX5898
12
14
16
16
500
500
500
500
CMOS
CMOS
CMOS
LVDS
Applications
Base Stations: 3G UMTS, CDMA, and GSM
Broadband Wireless Transmitters
Broadband Cable Infrastructure
Simplified Diagram
Instrumentation and Automatic Test Equipment (ATE)
Analog Quadrature Modulation Architectures
OUTI
DAC
DATA
PORT A
Pin Configuration appears at end of data sheet.
DATACLK
DATA
PORT B
DAC
SPI is a trademark of Motorola, Inc.
OUTQ
cdma2000 is a registered trademark of Telecommunications
Industry Association.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.