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MAX5895EGK-D PDF预览

MAX5895EGK-D

更新时间： 2024-09-12 05:49:07
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
31页 309K
描述
16-Bit, 500Msps Interpolating and Modulating Dual DAC with CMOS Inputs

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MAX5895EGK-D 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFN包装说明：10 X 10 MM, 0.90 MM HEIGHT, MO-220, QFN-68
针数：68Reach Compliance Code：not_compliant
风险等级：5.39最大模拟输出电压：1.1 V
最小模拟输出电压：-0.5 V转换器类型：D/A CONVERTER
输入位码：OFFSET BINARY, 2'S COMPLEMENT BINARY输入格式：PARALLEL, WORD
JESD-30 代码：S-XQCC-N68JESD-609代码：e0
长度：10 mm湿度敏感等级：3
位数：16功能数量：2
端子数量：68最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC68,.4SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：245电源：1.8,3.3 V
认证状态：Not Qualified座面最大高度：0.9 mm
标称安定时间 (tstl)：0.011 µs子类别：Other Converters
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：10 mm

MAX5895EGK-D 数据手册

 浏览型号MAX5895EGK-D的Datasheet PDF文件第2页浏览型号MAX5895EGK-D的Datasheet PDF文件第3页浏览型号MAX5895EGK-D的Datasheet PDF文件第4页浏览型号MAX5895EGK-D的Datasheet PDF文件第5页浏览型号MAX5895EGK-D的Datasheet PDF文件第6页浏览型号MAX5895EGK-D的Datasheet PDF文件第7页 
19-3545; Rev 2; 10/08  
16-Bit, 500Msps Interpolating and Modulating  
Dual DAC with CMOS Inputs  
MAX895  
General Description  
Features  
The MAX5895 programmable interpolating, modulating,  
500Msps, dual digital-to-analog converter (DAC) offers  
superior dynamic performance and is optimized for  
high-performance, wideband single- and multicarrier  
transmit applications. The device integrates a selectable  
2x/4x/8x interpolating filter, a digital quadrature modula-  
tor, and dual 16-bit high-speed DACs on a single IC. At  
30MHz output frequency and 500Msps update rate, the  
in-band SFDR is 88dBc while consuming 1.1W. The  
device also delivers 71dB ACLR for four-carrier WCDMA  
at a 61.44MHz output frequency.  
o 71dB ACLR at f  
= 61.44MHz (Four-Carrier  
OUT  
WCDMA)  
®
o Meets Multicarrier UMTS, cdma2000 , GSM  
Spectral Masks (f  
= 122MHz)  
OUT  
o Noise Spectral Density = -158dBFS/Hz at  
f
= 16MHz  
OUT  
o 92dBc SFDR at Low-IF Frequency (10MHz)  
o 90dBc SFDR at High-IF Frequency (50MHz)  
o Low Power: 511mW (f  
o User Programmable  
= 100MHz)  
CLK  
The selectable interpolating filters allow lower input data  
rates while taking advantage of the high DAC update  
rates. These linear-phase interpolation filters ease  
reconstruction filter requirements and enhance the  
passband dynamic performance. Individual offset and  
gain programmability allow the user to calibrate out local  
oscillator (LO) feedthrough and sideband suppression  
errors generated by analog quadrature modulators.  
Selectable 2x, 4x, or 8x Interpolating Filters  
< 0.01dB Passband Ripple  
> 99dB Stopband Rejection  
Selectable Real or Complex Modulator Operation  
Selectable Modulator LO Frequency: OFF, fIM/2, or  
fIM/4  
Selectable Output Filter: Lowpass or Highpass  
Channel Gain and Offset Adjustment  
The MAX5895 features a f /4 digital image-reject mod-  
IM  
o EV Kit Available (Order the MAX5895 EV Kit)  
ulator. This modulator generates a quadrature-modulat-  
ed IF signal that can be presented to an analog I/Q  
modulator to complete the upconversion process. A  
second digital modulation mode allows the signal to be  
Ordering Information  
PART  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
frequency-translated with image pairs at f /2 or f /4.  
IM  
IM  
MAX5895EGK-D  
MAX5895EGK+D  
D = Dry pack.  
68 QFN-EP*  
The MAX5895 features a standard 1.8V CMOS, 3.3V tol-  
erant data input bus for easy interface. A 3.3V SPI™ port  
is provided for mode configuration. The programmable  
modes include the selection of 2x/4x/8x interpolating fil-  
68 QFN-EP*  
*EP = Exposed pad.  
ters, f /2, f /4 or no digital quadrature modulation with  
IM  
IM  
+Denotes a lead-free/RoHS-compliant package.  
image rejection, channel gain and offset adjustment, and  
offset binary or two’s complement data interface.  
Selector Guide  
Pin-compatible 12- and 14-bit devices are also available.  
Refer to the MAX5894 data sheet for the 14-bit version  
and the MAX5893 data sheet for the 12-bit version.  
RESOLUTION DAC UPDATE  
INPUT  
LOGIC  
PART  
(BITS)  
RATE (Msps)  
MAX5893  
MAX5894  
MAX5895  
MAX5898  
12  
14  
16  
16  
500  
500  
500  
500  
CMOS  
CMOS  
CMOS  
LVDS  
Applications  
Base Stations: 3G Multicarrier UMTS, CDMA, and GSM  
Broadband Wireless Transmitters  
Broadband Cable Infrastructure  
Instrumentation and Automatic Test Equipment (ATE)  
Analog Quadrature Modulation Architectures  
Simplified Diagram  
OUTI  
DAC  
DATA  
PORT A  
Pin Configuration appears at end of data sheet.  
DATACLK  
DATA  
PORT B  
SPI is a trademark of Motorola, Inc.  
cdma2000 is a registered trademark of the Telecommunications  
Industry Association.  
DAC  
OUTQ  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
1234567...31

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MAX5895EGK-D 替代型号

型号 品牌 替代类型 描述 数据表
MAX5895EGK+D MAXIM

功能相似

 16-Bit, 500Msps Interpolating and Modulating Dual DAC with CMOS Inputs
MAX5893EGK+D MAXIM

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MAX5894EGK+D MAXIM

功能相似

 14-Bit, 500Msps, Interpolating and Modulating Dual DAC with CMOS Inputs

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