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M36W0R6050T1ZAQF PDF预览

M36W0R6050T1ZAQF

更新时间: 2024-11-19 04:18:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存存储内存集成电路静态存储器
页数 文件大小 规格书
22页 221K
描述
64 Mbit (4 Mb 】16, Multiple Bank, Burst) Flash memory and 32 Mbit (2 Mb 】16) PSRAM, multi-chip package

M36W0R6050T1ZAQF 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:BGA包装说明:8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88
针数:88Reach Compliance Code:compliant
HTS代码:8542.32.00.71风险等级:5.18
Is Samacsys:N最长访问时间:70 ns
其他特性:PSRAM IS ORGANIZED AS 2M X 16JESD-30 代码:R-PBGA-B88
JESD-609代码:e1长度:10 mm
内存密度:67108864 bit内存集成电路类型:MEMORY CIRCUIT
内存宽度:16混合内存类型:FLASH+PSRAM
功能数量:1端子数量:88
字数:4194304 words字数代码:4000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-30 °C组织:4MX16
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA88,8X12,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.8 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Other Memory ICs
最大供电电压 (Vsup):1.95 V最小供电电压 (Vsup):1.7 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:40宽度:8 mm
Base Number Matches:1

M36W0R6050T1ZAQF 数据手册

 浏览型号M36W0R6050T1ZAQF的Datasheet PDF文件第2页浏览型号M36W0R6050T1ZAQF的Datasheet PDF文件第3页浏览型号M36W0R6050T1ZAQF的Datasheet PDF文件第4页浏览型号M36W0R6050T1ZAQF的Datasheet PDF文件第5页浏览型号M36W0R6050T1ZAQF的Datasheet PDF文件第6页浏览型号M36W0R6050T1ZAQF的Datasheet PDF文件第7页 
M36W0R6050T1  
M36W0R6050B1  
64 Mbit (4 Mb ×16, Multiple Bank, Burst) Flash memory  
and 32 Mbit (2 Mb ×16) PSRAM, multi-chip package  
Features  
Multi-Chip Package  
– 1 die of 64 Mbit (4 Mb × 16) Flash memory  
– 1 die of 32 Mbit (2 Mb × 16) Pseudo SRAM  
FBGA  
Supply voltage  
– V  
= V  
= V  
= 1.7 V to 1.95 V  
DDQF  
DDF  
DDP  
Stacked TFBGA88  
(ZA)  
Low power consumption  
Electronic signature  
– Manufacturer Code: 20h  
– Device code (top flash configuration),  
M36W0R6050T1: 8810h  
Block locking  
– Device code (bottom flash configuration),  
M36W0R6050B1: 8811h  
– All blocks locked at Power-up  
– Any combination of blocks can be locked  
Package  
– WP for Block Lock-Down  
F
– ECOPACK®  
Security  
– 128-bit user programmable OTP cells  
– 64-bit unique device number  
Flash memory  
Programming time  
Common Flash Interface (CFI)  
– 8 µs by Word typical for Fast Factory  
Program  
100 000 program/erase cycles per block  
– Double/Quadruple Word Program option  
– Enhanced Factory Program options  
PSRAM  
Access time: 70 ns  
Memory blocks  
Asynchronous Page Read  
– Page size: 8 words  
– Multiple Bank memory array: 4 Mbit Banks  
– Parameter Blocks (Top or Bottom location)  
– First access within page: 70 ns  
– Subsequent read within page: 20 ns  
Synchronous / Asynchronous Read  
– Synchronous Burst Read mode: 66 MHz  
Three Power-down modes  
– Deep Power-Down  
– Asynchronous/ Synchronous Page Read  
mode  
– Random Access: 70 ns  
– Partial Array Refresh of 4 Mbits  
– Partial Array Refresh of 8 Mbits  
Dual operations  
– Program Erase in one Bank while Read in  
others  
– No delay between Read and Write  
operations  
January 2007  
1
1/22  
www.st.com  
1

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