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JANKCA2N5153 PDF预览

JANKCA2N5153

更新时间: 2024-01-20 15:22:30
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其他 - ETC 晶体晶体管开关
页数 文件大小 规格书
23页 136K
描述
TRANSISTOR | BJT | PNP | 80V V(BR)CEO | 5A I(C) | TO-39

JANKCA2N5153 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:unknown
风险等级:5.91最大集电极电流 (IC):5 A
配置:Single最小直流电流增益 (hFE):70
最高工作温度:175 °C极性/信道类型:PNP
最大功率耗散 (Abs):1 W子类别:Other Transistors
标称过渡频率 (fT):70 MHzBase Number Matches:1

JANKCA2N5153 数据手册

 浏览型号JANKCA2N5153的Datasheet PDF文件第2页浏览型号JANKCA2N5153的Datasheet PDF文件第3页浏览型号JANKCA2N5153的Datasheet PDF文件第4页浏览型号JANKCA2N5153的Datasheet PDF文件第5页浏览型号JANKCA2N5153的Datasheet PDF文件第6页浏览型号JANKCA2N5153的Datasheet PDF文件第7页 
The documentation and process conversion  
measures necessary to comply with this revision  
shall be completed by 27 October 2001.  
INCH-POUND  
MIL-PRF-19500/545D  
27 July 2001  
SUPERSEDING  
MIL-PRF-19500/545C  
21 July 2000  
PERFORMANCE SPECIFICATION  
SEMICONDUCTOR DEVICE, TRANSISTOR, PNP, SILICON, POWER  
TYPES 2N5151, 2N5153, 2N5151L, 2N5153L, 2N5151U3, AND 2N5153U3  
JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC  
This specification is approved for use by all Departments  
and Agencies of the Department of Defense.  
1. SCOPE  
1.1 Scope. This specification covers the performance requirements for PNP, silicon, power transistors for use in  
high-speed power-switching applications. Four levels of product assurance are provided for each encapsulated  
device type as specified in MIL-PRF-19500. Two levels of product assurance are provided for each unencapsulated  
device type.  
1.2 Physical dimensions. See figure 1 (similar to T0-205), figures 2, 3, and 4 (JANHC and JANKC), and  
figure 5 (U3).  
1.3 Maximum ratings.  
Types  
Reverse  
pulse (2)  
energy  
Safe  
operating  
area  
P
P
V
V
V
I
I
T
stg  
T
T
CBO  
CEO  
EBO  
C
C
(1)  
T
= +25°C  
T
= +25°C  
and T  
J
A
C
W
W
V dc  
V dc  
V dc  
A dc A dc  
mj  
°C  
2N5151, L  
2N5153, L  
1 (3)  
1 (3)  
11.8 (4)  
11.8 (4)  
100  
100  
80  
80  
5.5  
5.5  
2
2
10  
10  
15  
15  
See  
figure 6  
-65 to  
+ 200  
2N5151U3  
2N5153U3  
1.16 (5)  
1.16 (5)  
100 (6)  
100 (6)  
100  
100  
80  
80  
5.5  
5.5  
2
2
10  
10  
15  
15  
See  
figure 6  
-65 to  
+ 200  
(1) This value applies for Pw 8.3 ms, duty cycle 1 percent.  
(2) This rating is based on the capability of the transistors to operate safely in the unclamped inductive load energy  
test circuit of figure 7.  
(3) Derate linearly 5.7 mW/°C for TA > +25°C.  
(4) Derate linearly 66.7 mW/°C for TC > +25°C.  
(5) Derate linearly 6.67 mW/°C for TA > +25°C.  
(6) Derate linearly 571 mW/°C for TC > +25°C.  
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in  
improving this document should be addressed to: Commander, Defense Supply Center Columbus, ATTN: DSCC-  
VAC, P. O. Box 3990, Columbus, OH 43216-5000, by using the Standardization Document Improvement Proposal  
(DD Form 1426) appearing at the end of this document or by letter.  
AMSC N/A  
FSC 5961  
DISTRIBUTION STATEMENT. Approved for public release; distribution is unlimited.  

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