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IS66WVD409616ALL-7008BLI PDF预览

IS66WVD409616ALL-7008BLI

更新时间： 2024-11-14 14:51:39
品牌 Logo 应用领域
美国芯成 - ISSI 内存集成电路
页数 文件大小 规格书
52页 1504K
描述
Pseudo Static RAM, 4MX16, 70ns, CMOS, PBGA54, 8 X 6 MM, MO-207, VFBGA-54

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IS66WVD409616ALL-7008BLI 技术参数

生命周期：Active包装说明：VFBGA,
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.8
最长访问时间：70 nsJESD-30 代码：R-PBGA-B54
长度：8 mm内存密度：67108864 bit
内存集成电路类型：PSEUDO STATIC RAM内存宽度：16
功能数量：1端子数量：54
字数：4194304 words字数代码：4000000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：4MX16
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装形状：RECTANGULAR封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
并行/串行：PARALLEL认证状态：Not Qualified
座面最大高度：1 mm最大供电电压 (Vsup)：1.95 V
最小供电电压 (Vsup)：1.7 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.75 mm端子位置：BOTTOM
宽度：6 mmBase Number Matches：1

IS66WVD409616ALL-7008BLI 数据手册

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IS66WVD409616ALL  
Advanced Information  
64Mb Async and Burst CellularRAM 2.0  
Overview  
The IS66WVD409616ALL is an integrated memory device containing 64Mbit Pseudo Static Random  
Access Memory using a self-refresh DRAM array organized as 4M words by 16 bits. The device uses a  
multiplexed address and data bus scheme to minimize pins and includes a industry standard burst  
mode for increased read and write bandwidth. The device includes several power saving modes :  
Reduced Array Refresh mode where data is retained in a portion of the array and Temperature  
Controlled Refresh. Both these modes reduce standby current drain. The device can be operated in a  
standard asynchronous mode and high performance burst mode. The die has separate power rails,  
VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core.  
Features  
z Single device supports asynchronous and burst  
z Low Power Consumption  
operation  
y Asynchronous Operation < 25 mA  
y Burst operation < 45 mA (@133Mhz)  
y Standby < 140 uA(max.)  
z Mixed Mode supports asynchronous write and  
synchronous read operation  
z Dual voltage rails for optional performance  
y VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  
z Multiplexed address and data bus  
y ADQ0~ADQ15  
z Asynchronous mode read access : 70ns  
z Burst mode for Read and Write operation  
y 4, 8, 16 or Continuous  
y Deep power-down (DPD) < 3uA (Typ)  
z Low Power Feature  
y Reduced Array Refresh  
y Temperature Controlled Refresh  
z Operation Frequency up to 133MHz  
z Operating temperature Range  
Industrial -40°C~85°C  
z Package: 54-ball VFBGA  
Copyright © 2009 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its  
products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services  
described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information  
and before placing orders for products.  
1
www.issi.com - SRAM@issi.com  
Rev.00A | January 2010  
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