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IS61LV12816L-10BI PDF预览

IS61LV12816L-10BI

更新时间: 2024-11-20 04:01:35
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路静态存储器
页数 文件大小 规格书
16页 112K
描述
128K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV12816L-10BI 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:BGA
包装说明:TFBGA, BGA48,6X8,30针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41Factory Lead Time:8 weeks
风险等级:5.21Is Samacsys:N
最长访问时间:10 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e0
长度:8 mm内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:48字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):240电源:3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.004 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.065 mA
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):2.97 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:10宽度:6 mm
Base Number Matches:1

IS61LV12816L-10BI 数据手册

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®
IS61LV12816L  
ISSI  
128K x 16 HIGH-SPEED CMOS STATIC RAM  
WITH 3.3V SUPPLY  
OCTOBER2005  
FEATURES  
DESCRIPTION  
The ISSI IS61LV12816L is a high-speed, 2,097,152-bit  
static RAM organized as 131,072 words by 16 bits. It is  
fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovative circuit design techniques, yields access times  
as fast as 8 ns with low power consumption.  
• High-speed access time: 8, 10 ns  
• Operating Current: 50mA (typ.)  
• Stand by Current: 700µA (typ.)  
• TTL and CMOS compatible interface levels  
• Single 3.3V power supply  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
EasymemoryexpansionisprovidedbyusingChipEnable  
and Output Enable inputs, CE and OE. The active LOW  
WriteEnable(WE)controlsbothwritingandreadingofthe  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Data control for upper and lower bytes  
• Industrial temperature available  
• Lead-free available  
The IS61LV12816L is packaged in the JEDEC standard  
44-pinTSOP(TypeII),44-pinLQFP,and48-pinminiBGA  
(6mm x 8mm).  
FUNCTIONAL BLOCK DIAGRAM  
128Kx16  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
UB  
LB  
CONTROL  
CIRCUIT  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. F  
1
10/27/05  

IS61LV12816L-10BI 替代型号

型号 品牌 替代类型 描述 数据表
IS61LV12816L-10BLI ISSI

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