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IS61LV12816L-10T PDF预览

IS61LV12816L-10T

更新时间: 2024-11-20 04:01:35
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
16页 112K
描述
128K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV12816L-10T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSOP2
包装说明:PLASTIC, TSOP2-44针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.22
最长访问时间:10 ns其他特性:BYTE READ/WRITE
I/O 类型:COMMONJESD-30 代码:R-PDSO-G44
JESD-609代码:e0长度:18.415 mm
内存密度:2097152 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:44
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP44,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.003 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.06 mA最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

IS61LV12816L-10T 数据手册

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®
IS61LV12816L  
ISSI  
128K x 16 HIGH-SPEED CMOS STATIC RAM  
WITH 3.3V SUPPLY  
OCTOBER2005  
FEATURES  
DESCRIPTION  
The ISSI IS61LV12816L is a high-speed, 2,097,152-bit  
static RAM organized as 131,072 words by 16 bits. It is  
fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovative circuit design techniques, yields access times  
as fast as 8 ns with low power consumption.  
• High-speed access time: 8, 10 ns  
• Operating Current: 50mA (typ.)  
• Stand by Current: 700µA (typ.)  
• TTL and CMOS compatible interface levels  
• Single 3.3V power supply  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
EasymemoryexpansionisprovidedbyusingChipEnable  
and Output Enable inputs, CE and OE. The active LOW  
WriteEnable(WE)controlsbothwritingandreadingofthe  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Data control for upper and lower bytes  
• Industrial temperature available  
• Lead-free available  
The IS61LV12816L is packaged in the JEDEC standard  
44-pinTSOP(TypeII),44-pinLQFP,and48-pinminiBGA  
(6mm x 8mm).  
FUNCTIONAL BLOCK DIAGRAM  
128Kx16  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
UB  
LB  
CONTROL  
CIRCUIT  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. F  
1
10/27/05  

IS61LV12816L-10T 替代型号

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