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IS61LV12824-8TQ PDF预览

IS61LV12824-8TQ

更新时间: 2024-11-23 22:48:03
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
13页 77K
描述
128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV12824-8TQ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-100针数:100
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.78
最长访问时间:8 nsI/O 类型:COMMON
JESD-30 代码:R-PQFP-G100JESD-609代码:e0
长度:20 mm内存密度:3145728 bit
内存集成电路类型:STANDARD SRAM内存宽度:24
功能数量:1端子数量:100
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX24
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP100,.63X.87
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.01 A
最小待机电流:3.14 V子类别:SRAMs
最大压摆率:0.21 mA最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mmBase Number Matches:1

IS61LV12824-8TQ 数据手册

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®
IS61LV12824  
128K x 24 HIGH-SPEED CMOS STATIC RAM  
WITH 3.3V SUPPLY  
ISSI  
JUNE 2005  
FEATURES  
DESCRIPTION  
TheISSIIS61LV12824isahigh-speed, staticRAMorganized  
as 131,072 words by 24 bits. It is fabricated using ISSI's high-  
performance CMOS technology. This highly reliable process  
coupled with innovative circuit design techniques, yields ac-  
cess times as fast as 8 ns with low power consumption.  
• High-speed access time: 8, 10 ns  
• CMOS low power operation  
— 756 mW (max.) operating @ 8 ns  
— 36 mW (max.) standby @ 8 ns  
• TTL compatible interface levels  
• Single 3.3V power supply  
When CE1, CE2 are HIGH and CE2 is LOW (deselected), the  
device assumes a standby mode at which the power dissipa-  
tion can be reduced down with CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
Easy memory expansion is provided by using Chip Enable  
andOutputEnableinputs,CE1, CE2, CE2and OE. Theactive  
LOW Write Enable (WE) controls both writing and reading of  
the memory.  
• Three state outputs  
• Available in 119-pin Plastic Ball Grid Array  
(PBGA) and 100-pin TQFP packages.  
• Industrial temperature available  
• Lead-free available  
The IS61LV12824 is packaged in the JEDEC standard  
119-pin PBGA and 100-pin TQFP.  
FUNCTIONAL BLOCK DIAGRAM  
128K x 24  
MEMORY ARRAY  
A0-A16  
DECODER  
VCC  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O23  
CIRCUIT  
CE2  
CE1  
CE2  
OE  
CONTROL  
CIRCUIT  
WE  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
Rev. D  
1
06/22/05  

IS61LV12824-8TQ 替代型号

型号 品牌 替代类型 描述 数据表
IS61LV12824-10TQLI ISSI

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128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
IS61LV12824-10TQI ISSI

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128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
IS61LV12824-10TQ ISSI

类似代替

128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

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