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IS61LV12816L-10LQ PDF预览

IS61LV12816L-10LQ

更新时间: 2024-11-24 20:58:11
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
12页 58K
描述
Standard SRAM, 128KX16, 10ns, CMOS, PQFP44, MS-026, LQFP-44

IS61LV12816L-10LQ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP, QFP44,.47SQ,32针数:44
Reach Compliance Code:not_compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.65
最长访问时间:10 nsI/O 类型:COMMON
JESD-30 代码:S-PQFP-G44JESD-609代码:e0
长度:10 mm内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:44字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装等效代码:QFP44,.47SQ,32封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:1.6 mm
最大待机电流:0.003 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.06 mA
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):2.97 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

IS61LV12816L-10LQ 数据手册

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®
IS61LV12816L  
IS61LV12816LL  
ISSI  
128K x 16 HIGH-SPEED CMOS STATIC RAM  
WITH 3.3V SUPPLY  
PRELIMINARYINFORMATION  
JULY2002  
FEATURES  
DESCRIPTION  
TheISSIIS61LV12816L/IS61LV12816LLisahigh-speed,  
2,097,152-bit static RAM organized as 131,072 words by  
16 bits. It is fabricated using ISSI's high-performance  
CMOS technology. This highly reliable process coupled  
with innovative circuit design techniques, yields access  
times as fast as 8 ns with low power consumption.  
• High-speed access time:  
IS61LV12816L: 8, 10 ns  
IS61LV12816LL: 12, 15 ns  
• Operating Current:  
IS61LV12816L: 50mA (typ.)  
IS61LV12816LL: 25mA (typ.)  
• Stand by Current:  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
IS61LV12816L: 500µA (typ.)  
IS61LV12816LL: 250µA(typ.)  
• TTL and CMOS compatible interface levels  
• Single 3.3V power supply  
EasymemoryexpansionisprovidedbyusingChipEnable  
and Output Enable inputs, CE and OE. The active LOW  
WriteEnable(WE)controlsbothwritingandreadingofthe  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Fully static operation: no clock or refresh  
required  
The IS61LV12816L/IS61LV12816LL is packaged in the  
JEDEC standard 44-pin TSOP, 44-pin LQFP, and 48-pin  
mini BGA (6mm x 8mm).  
• Three state outputs  
• Data control for upper and lower bytes  
• Industrial temperature available  
FUNCTIONAL BLOCK DIAGRAM  
128Kx16  
MEMORY ARRAY  
A0-A16  
DECODER  
VCC  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O8-I/O15  
Upper Byte  
CS2  
CS1  
OE  
WE  
UB  
CONTROL  
CIRCUIT  
LB  
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
PRELIMINARYINFORMATION Rev. 00B  
1
07/30/02  

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