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IDT71V256SA12PZGI PDF预览

IDT71V256SA12PZGI

更新时间: 2024-11-16 19:34:47
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
8页 90K
描述
Cache SRAM, 32KX8, 12ns, CMOS, PDSO28, 0.300 INCH, TSOP1-28

IDT71V256SA12PZGI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP
包装说明:TSOP1,针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.61
最长访问时间:12 nsJESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:11.8 mm
内存密度:262144 bit内存集成电路类型:CACHE SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.55 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:8 mm
Base Number Matches:1

IDT71V256SA12PZGI 数据手册

 浏览型号IDT71V256SA12PZGI的Datasheet PDF文件第2页浏览型号IDT71V256SA12PZGI的Datasheet PDF文件第3页浏览型号IDT71V256SA12PZGI的Datasheet PDF文件第4页浏览型号IDT71V256SA12PZGI的Datasheet PDF文件第5页浏览型号IDT71V256SA12PZGI的Datasheet PDF文件第6页浏览型号IDT71V256SA12PZGI的Datasheet PDF文件第7页 
Lower Power  
IDT71V256SA  
3.3V CMOS Fast SRAM  
256K (32K x 8-Bit)  
Features  
Description  
Ideal for high-performance processor secondary cache  
Commercial (0°C to +70°C) and Industrial (–40°C to +85°C)  
temperature range options  
TheIDT71V256SAisa 262,144-bithigh-speedstaticRAMorganized  
as32Kx8.ItisfabricatedusingIDT’shigh-performance,high-reliability  
CMOStechnology.  
Fast access times:  
TheIDT71V256SAhasoutstandinglowpowercharacteristicswhile  
at the same time maintaining very high performance. Address access  
times of as fast as 10ns are ideal for 3.3V secondary cache in 3.3V  
desktopdesigns.  
When power management logic puts the IDT71V256SA in standby  
mode,itsverylowpowercharacteristicscontributetoextendedbatterylife.  
BytakingCSHIGH,theSRAMwillautomaticallygotoalowpowerstandby  
modeandwillremaininstandbyaslongasCSremainsHIGH. Further-  
more,underfullstandbymode(CSatCMOSlevel,f=0),powerconsump-  
tionisguaranteedtoalwaysbelessthan6.6mWandtypicallywillbemuch  
smaller.  
– CommercialandIndustrial:10/12/15/20ns  
Low standby current (maximum):  
– 2mAfullstandby  
Small packages for space-efficient layouts:  
– 28-pin 300 mil SOJ  
– 28-pin TSOP Type I  
Produced with advanced high-performance CMOS  
technology  
Inputs and outputs are LVTTL-compatible  
Single 3.3V(±0.3V) power supply  
TheIDT71V256SAispackagedina28-pin300milSOJanda28-pin  
300 mil TSOP Type I.  
FunctionalBlockDiagram  
A0  
VCC  
GND  
262,144 BIT  
MEMORY ARRAY  
ADDRESS  
DECODER  
A14  
I/O  
0
I/O CONTROL  
INPUT  
DATA  
CIRCUIT  
I/O7  
,
CS  
OE  
CONTROL  
CIRCUIT  
3101 drw 01  
WE  
JUNE 2012  
1
DSC-3101/09  
©2012IntegratedDeviceTechnology,Inc.  

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