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ICS9342

更新时间: 2024-11-05 22:55:27
品牌 Logo 应用领域
矽成 - ICSI 时钟发生器PC
页数 文件大小 规格书
10页 177K
描述
133MHz Clock Generator and Integrated Buffer for PowerPC⑩

ICS9342 数据手册

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Integrated  
Circuit  
Systems, Inc.  
ICS9342  
133MHz Clock Generator and Integrated Buffer for PowerPC™  
Recommended Application:  
Power PC System Clock  
Pin Configuration  
VDDREF  
REF1  
REF0  
GNDREF  
X1  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
OUTSEL1*  
VDDCPU  
GNDCPU  
CPU0  
CPU1  
CPU2  
VDDCPU  
GNDCPU  
CPU3  
CPU4  
CPU5  
VDDCPU  
GNDCPU  
CPU6  
CPU7  
CPU8  
VDDCPU  
GNDCPU  
CPU9  
CPU10  
CPU11  
Output Features:  
12- CPUs @ 3.3V, up to 146MHz  
1- PCIREF @ 3.3V, up to 73MHz  
1 - OUT 3.3V, 64MHz  
1 - OUT/2 3.3V, OUT/2MHz  
2 - REF @ 3.3V, 14.318MHz  
X2  
*PD#  
*CPU-STOP#  
VDD  
GND  
*PCI_STOP#  
*SS_EN#  
VDDPCI  
PCIREF  
GNDPCI  
*FS0  
Features:  
Up to 146MHz frequency support  
Support power management: CPU, PCI stop and power  
down mode.  
*FS1  
*FS2  
VDDFP  
Spread spectrum for EMI control (0 to -0.5%, ± 0.25%).  
Uses external 14.318MHz crystal  
FS pins for frequency select  
GNDFP  
*TEST#/OUT  
*BOOST#/OUT_DIV2  
*PDFP#  
VDDA  
VDDCPU  
GNDCPU  
OUTSEL0*  
Support for industrial temperature range (-40C° to 85C°)  
48-Pin 300mil SSOP  
* Internal pull-up resistor of 120K to VDD  
on indicated inputsꢀ  
Key Specifications:  
CPU Output Skew: <200ps  
CPU - PCI Output Skew: <500ps  
CPU Output Jitter: <150ps  
PCI Output Jitter: <500ps  
Functionality  
Block Diagram  
CPU  
MHz  
PCI  
MHz  
REF  
MHz  
PLL2  
OUT  
TEST  
FS2  
FS1 FS0  
OUT/DIV2  
/ 2  
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
133.33  
100.00  
83.33  
33.33  
33.33  
33.33  
33.33  
66.66  
66.66  
66.66  
66.66  
14.318  
14.318  
14.318  
14.318  
14.318  
14.318  
14.318  
14.318  
X1  
X2  
XTAL  
OSC  
REF (1:0)  
2
PLL1  
Spread  
Spectrum  
CPU  
DIVDER  
Stop  
CPUCLK (11:0)  
12  
66.66  
133.33  
100.00  
83.33  
OUTSEL (1:0)  
SS_EN#  
PCI  
DIVDER  
Control  
Logic  
Stop  
PCIREF  
66.66  
FS (2:0)  
PD#  
Config.  
Reg.  
PDFP#  
TEST#  
BOOST#  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
9342 Rev E 9/06/00  
Third party brands and names are the property of their respective owners.  
information being relied upon by the customer is current and accurate.  

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