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ICS93712 PDF预览

ICS93712

更新时间: 2024-11-05 22:55:27
品牌 Logo 应用领域
矽成 - ICSI 双倍数据速率
页数 文件大小 规格书
6页 390K
描述
2 DIMM DDR Fanout Buffer

ICS93712 数据手册

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ICS93712  
Integrated  
Circuit  
Systems, Incꢀ  
Advance Information  
2 DIMM DDR Fanout Buffer  
Pin Configuration  
RecommendedApplication:  
DDR fan out buffer for VIA PRO 266 DDR chipset  
FBOUT  
GND  
DDRT0  
DDRC0  
VDD2.5  
GND  
DDRT1  
DDRC1  
VDD2.5  
BUF_IN  
GND  
DDRT2  
DDRC2  
VDD2.5  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
GND  
ProductDescription/Features:  
DDRT5  
DDRC5  
VDD2.5  
GND  
3
4
5
•
•
•
•
•
•
•
Low skew, fanout buffer  
1 to 6 differential clock distribution  
I2C for functional and output control  
Feedback pin for input to output synchronization  
Supports up to 2 DDR DIMMs  
Frequency support for up to 400MHz DDR, SDRAMs  
CMOS level control signal input  
6
7
8
9
DDRT4  
DDRC4  
VDD2.5  
GND  
10  
11  
12  
13  
14  
DDRT3  
DDRC3  
VDD2.5  
SCLK  
Switching Characteristics:  
SDATA  
•
•
•
•
OUTPUT-OUTPUTskew:<100ps  
Output Rise and Fall Time for DDR outputs: 650ps - 950ps  
DUTYCYCLE:47%-53%  
28-Pin SSOP  
PulseSkew:<100ps  
Block Diagram  
FB_OUT  
BUF_IN  
DDRT0  
DDRC0  
DDRT1  
DDRC1  
Control  
Logic  
DDRT1  
DDRC2  
SCLK  
SDATA  
DDRT3  
DDRC3  
DDRT4  
DDRC4  
DDRT5  
DDRC5  
ADVANCE INFORMATION documents contain information on products  
in the formative or design phase development. Characteristic data and  
other specifications are design goals. ICS reserves the right to change or  
discontinue these products without notice.  
93712 Rev - 9/08/00  

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