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ICS9248YF-127-T PDF预览

ICS9248YF-127-T

更新时间： 2024-11-12 22:09:47
品牌 Logo 应用领域
矽成 - ICSI 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
14页 282K
描述
Frequency Generator & Integrated Buffers for PENTIUM/ProTM

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ICS9248YF-127-T 数据手册

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Integrated  
Circuit  
Systems, Inc.  
ICS9248-127  
Frequency Generator & Integrated Buffers for PENTIUM/ProTM  
General Description  
The ICS9248-127 is the single chip clock solution for Desktop  
designs using the VIA MVP4 and Aladdin 7 style chipset. It  
provides all necessary clock signals for such a system.  
Features  
•
•
Up to 124MHz frequency support.  
Spread Spectrum for EMI control 0 to -0.5% down  
spread and ±0.25% center spread  
Serial I2C interface for Power Management,  
Frequency Select, Spread Spectrum.  
Provides the following system clocks  
- 4-CPUs @ 3.3V, up to 124MHz.  
- 13-SDRAMs @3.3V, up to 124MHz  
(including SDRAM_F)  
•
•
Spread spectrum may be enabled through I2C programming.  
Spread spectrum typically reduces system EMI by 8dB to  
10dB. This simplifies EMI qualification without resorting to  
board design iterations or costly shielding. The ICS9248-  
127 employs a proprietary closed loop design, which tightly  
controls the percentage of spreading over process and  
temperature variations.  
- 6-PCI (including 1 free running, PCICLK_F)  
@3.3V, CPU/2 or CPU/3.  
- 1-24MHz @3.3V fixed.  
- 1-48MHz @3.3V fixed.  
- 2-REF @3.3V, 14.318MHz.  
Efficient Power management scheme through PCI  
and STOP CLOCKS.  
•
Block Diagram  
PLL2  
48MHz  
24MHz  
Pin Configuration  
/ 2  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VDDREF  
*PCI_STOP#/REF0  
GND  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
REF1/FS2*  
VDDCPU  
CPUCLK_F  
CPUCLK0  
GND  
CPUCLK1  
CPUCLK2  
CLK_STOP#  
GND  
SDRAM_F  
SDRAM0  
SDRAM1  
VDDSDR  
SDRAM2  
SDRAM3  
GND  
SDRAM4  
SDRAM5  
VDDSDR  
SDRAM6  
SDRAM7  
VDD48  
X1  
X2  
XTAL  
OSC  
REF (1:0)  
2
X1  
X2  
VDDPCI  
BUFFER IN  
*MODE/PCICLK_F  
*FS3/PCICLK0  
GND  
CPUCLK_F  
PLL1  
Spread  
Spectrum  
PCICLK1  
PCICLK2  
PCICLK3  
PCICLK4  
VDDPCI  
STOP  
STOP  
CPUCLK (2:0)  
3
FS(3:0)  
MODE  
4
SDRAM (11:0)  
SDRAM_F  
LATCH  
POR  
BUFFER IN  
GND  
12  
4
SDRAM11  
SDRAM10  
VDDSDR  
SDRAM9  
SDRAM8  
GND  
PCI  
CLOCK  
DIVDER  
CLK_STOP#  
PCI_STOP#  
STOP  
PCICLK (4:0)  
PCICLK_F  
5
Control  
Logic  
SDATA  
SCLK  
48MHz/FS0*  
24MHz/FS1*  
Config.  
Reg.  
SDATA  
SCLK  
48-Pin SSOP  
* Internal Pull-up Resistor of 240K to VDD  
Power Groups  
VDDCPU, GNDCPU=CPUCLKS, CPUCLK_F  
VDDSDR, GNDSDR=SDRAMCLKS, SDRAM_F  
VDDPCI, GNDPCI=PCICLKS, PCICLK_F  
VDD48 = 48MHz, 24MHz  
VDDREF, GNDREF=REF, X1, X2  
Pentium is a trademark of Intel Corporation  
I2C is a trademark of Philips Corporation  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
9248-127RevC8/18/00  
information being relied upon by the customer is current and accurate.  
1234567...14

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