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ICS9248YF-162 PDF预览

ICS9248YF-162

更新时间： 2024-09-26 06:27:51
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
16页 472K
描述
Processor Specific Clock Generator, 137MHz, PDSO48, 0.300 INCH, SSOP-48

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ICS9248YF-162 数据手册

 浏览型号ICS9248YF-162的Datasheet PDF文件第2页浏览型号ICS9248YF-162的Datasheet PDF文件第3页浏览型号ICS9248YF-162的Datasheet PDF文件第4页浏览型号ICS9248YF-162的Datasheet PDF文件第5页浏览型号ICS9248YF-162的Datasheet PDF文件第6页浏览型号ICS9248YF-162的Datasheet PDF文件第7页 
Integrated  
Circuit  
Systems, Incꢀ  
ICS9248-162  
Frequency Generator & Integrated Buffers for PENTIUM/ProTM  
& K6  
General Description  
The ICS9248-162 is the single chip clock solution for various  
mobilechipsetplatforms$Itprovidesallnecessaryclocksignals  
for such a system$  
Features  
•
•
•
Up to 137MHz frequency support  
Spread Spectrum for EMI control  
Serial I2C interface for Power Management,  
Frequency Select, Spread Spectrum$  
Provides the following system clocks  
- 4-CPUs@2$5/3$3V, upto137MHz$  
(includingCPUCLK_F)  
•
Spread spectrum may be enabled through I2C programming$  
Spread spectrum typically reduces system EMI by 8dB to  
10dB$ This simplifies EMI qualification without resorting to  
board design iterations or costly shielding$ The ICS9248-162  
employs a proprietary closed loop design, which tightly  
controls the percentage of spreading over process and  
temperature variations$  
- 9-SDRAMs @3$3V, upto137MHz  
(including SDRAM_F)  
- 8-PCI@3$3V, CPU/2orCPU/3  
(including 1 free running PCICLK_F)  
- 1-24/48MHz@3$3V  
-1-48MHz@3$3Vfixed  
- 2-REF@3$3V,14$318MHz$  
Efficient Power management scheme through PCI  
andCLKSTOPCLOCKS  
•
•
Spread Spectrum ± $25%, & 0 to -0$5% down spread  
Block Diagram  
Pin Configuration  
PLL2  
48MHz  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VDDREF  
REF0  
GNDREF  
X1  
X2  
VDDPCI  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
REF1/FS2*  
VDDLCPU  
CPUCLK_F  
CPUCLK0  
GNDLCPU  
CPUCLK1  
CPUCLK2  
CLK_STOP#  
GNDSDR  
SDRAM_F  
SDRAM0  
SDRAM1  
VDDSDR  
SDRAM2  
SDRAM3  
GNDSDR  
SDRAM4  
24_48MHz  
REF(1:0)  
/ 2  
X1  
X2  
XTAL  
OSC  
2
BUFFER IN  
*CPU2.5_3.3#/PCICLK_F  
*FS3/PCICLK0  
GNDPCI  
*SEL24_48#/PCICLK1  
PCICLK2  
CPUCLK_F  
PLL1  
Spread  
Spectrum  
STOP  
STOP  
CPUCLK (2:0)  
3
PCICLK3  
PCICLK4  
VDDPCI  
BUFFER IN  
GNDPCI  
PCICLK5  
PCICLK6  
VDDCOR  
PCI_STOP#  
*PD#  
FS(3:0)  
SDRAM (7:0)  
SDRAM_F  
LATCH  
POR  
8
SEL24_48#  
PCI  
CLOCK  
DIVDER  
CLK_STOP#  
STOP  
PCICLK (6:0)  
PCICLK_F  
7
PCI_STOP#  
CPU2.5_3.3#  
SDRAM5  
VDDSDR  
SDRAM6  
SDRAM7  
VDD48  
Control  
Logic  
SDATA  
SCLK  
PD#  
Config.  
Reg.  
GND48  
SDATA  
SCLK  
48MHz/FS0*  
24_48MHz/FS1*  
48-Pin SSOP and TSSOP  
* Internal Pull-up Resistor of 120K to VDD  
Power Groups  
VDDLCPU,GNDLCPU=CPUCLK[2:0],CPUCLK_F  
VDDSDR,GNDSDR=SDRAMCLKS[7:0],SDRAM_F  
VDDPCI,GNDPCI=PCICLKS[6:0],PCICLK_F  
VDD48,GND48=48MHz,24MHz  
VDDREF,GNDREF=REF,X1,X2  
VDDCOR=PLLCORE  
Pentium is a trademark of Intel Corporation  
I2C is a trademark of Philips Corporation  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
9248-162RevA8/31/00  
information being relied upon by the customer is current and accurate.  
1234567...16

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