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ICS9248YF-146-T PDF预览

ICS9248YF-146-T

更新时间： 2024-11-12 22:09:47
品牌 Logo 应用领域
矽成 - ICSI 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
16页 194K
描述
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩

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ICS9248YF-146-T 数据手册

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Integrated  
Circuit  
Systems, Inc.  
ICS9248-146  
Frequency Generator & Integrated Buffers for Celeron & PII/III™  
Recommended Application:  
Single chip clock solution for SIS630S chipsets.  
Pin Configuration  
VDDA  
(AGPSEL)REF0  
1
2
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VDDL  
1
*
CPUCLK0  
CPUCLK1  
CPUCLK2  
GND  
Output Features:  
1
*(FS3)REF1  
3
4
5
GND  
X1  
X2  
•
•
•
•
•
•
3- CPUs @ 2.5V  
13 - SDRAM @ 3.3V  
6- PCI @3.3V,  
6
VDDSDR  
VDDPCI  
7
SDRAM0  
*(FS1)PCICLK_F  
*(FS2)PCICLK0  
PCICLK1  
PCICLK2  
PCICLK3  
PCICLK4  
GND  
8
SDRAM1  
9
SDRAM2  
2 - AGP @ 3.3V  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
GND  
SDRAM3  
SDRAM4  
SDRAM5  
VDDSDR  
SDRAM6  
SDRAM7  
GND  
SDRAM8/PD#  
SDRAM9/SDRAM_STOP#  
GND  
SDRAM10/PCI_STOP#  
SDRAM11/CPU_STOP#  
SDRAM12  
VDDSDR  
1- 48MHz, @3.3V fixed.  
1- 24/48MHz, @3.3V selectable by I2C  
(Default is 24MHz)  
VDDAGP  
AGPCLK0  
AGPCLK1  
GND  
•
2- REF @3.3V, 14.318MHz.  
Features:  
GND  
*(FS0)48MHz  
*(MODE)24_48MHz  
VDD48  
•
•
•
Up to 166MHz frequency support  
Support FS0-FS3 trapping status bit for I2C read back.  
SDATA  
SCLK  
Support power management: CPU, PCI, SDRAM stops  
and Power down Mode form I2C programming.  
48-Pin 300mil SSOP  
•
•
Spread spectrum for EMI control (0 to -0.5%, 0.25%).  
Uses external 14.318MHz crystal  
*1These inputs have a 120K pull down to GND.  
These are double strength.  
Skew Specifications:  
•
•
•
•
CPU - CPU: < 175ps  
SDRAM - SDRAM < 250ps (except SDRAM12)  
PCI - PCI: < 500ps  
CPU (early) - PCI: 1-4ns (typ. 2ns)  
Functionality  
Block Diagram  
AGP SEL AGP SEL  
FS3 FS2 FS1 FS0 CPU SDRAM PCICLK  
PLL2  
48MHz  
= 0  
= 1  
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
66.67  
100.00 100.00  
166.67 166.67  
133.33 133.33  
66.67 100.00  
100.00 66.67  
100.00 133.33  
133.33 100.00  
112.00 112.00  
124.00 124.00  
66.67  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.60  
31.00  
66.67  
66.67  
66.66  
66.67  
66.67  
66.67  
66.67  
66.67  
67.20  
62.00  
50.00  
50.00  
55.56  
50.00  
50.00  
50.00  
50.00  
50.00  
56.00  
46.50  
24_48MHz  
/ 2  
X1  
X2  
XTAL  
OSC  
REF(1:0)  
2
3
PLL1  
Spread  
Spectrum  
CPU  
DIVDER  
Stop  
CPUCLK (2:0)  
SDRAM (12:0)  
SDRAM  
DIVDER  
Stop  
Stop  
13  
5
SDATA  
SCLK  
Control  
Logic  
PCI  
DIVDER  
PCICLK (4:0)  
PCICLK_F  
AGP (1:0)  
1
1
0
0
1
1
0
1
138.00 138.00  
150.00 150.00  
34.50  
30.00  
69.00  
60.00  
51.75  
50.00  
FS(3:0)  
PD#  
AGP  
DIVDER  
PCI_STOP#  
CPU_STOP#  
SDRAM_STOP#  
MODE  
2
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
66.67 133.33  
100.00 150.00  
150.00 100.00  
160.00 120.00  
33.33  
30.00  
30.00  
30.00  
66.67  
60.00  
60.00  
60.00  
50.00  
50.00  
50.00  
48.00  
Config.  
Reg.  
AGP_SEL  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
9248-146 RevA- 4/23/01  
Third party brands and names are the property of their respective owners.  
information being relied upon by the customer is current and accurate.  
1234567...16

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