Datasheet > ICS873991AY-147LFT

ICS873991AY-147LFT

更新时间： 2024-09-29 02:54:07

品牌	Logo	应用领域
艾迪悌 - IDT		时钟发生器
页数	文件大小	规格书
17页	307K
描述
LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR

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ICS873991AY-147LFT 数据手册

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PRELIMINARY

LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL

CLOCK GENERATOR

ICS873991-147

GENERAL DESCRIPTION

FEATURES

• Fourteen differential 3.3V LVPECL/ECL outputs

• Selectable differential LVPECL or REF_CLK inputs

The ICS873991-147 is a low voltage, low skew, 3.3V

ICS

LVPECL or ECL Clock Generator and a member of

the HiPerClockS™ family of High Performance

Clock Solutions from IDT. The ICS873991-147 has

two selectable clock inputs. The PCLK, nPCLK pair

HiPerClockS™

• PCLK, nPCLK can accept the following input levels:

LVPECL, CML, SSTL

can accept an LVPECL input and the REF_CLK pin can accept

a LVCMOS or LVTTL input. This device has a fully integrated

PLL along with frequency configurable outputs. An external

feedback input and output regenerates clocks with “zero de-

lay”.

• REF_CLK accepts the following input levels:

LVCMOS, LVTTL

• Input clock frequency range: 6.25MHz to 125MHz

• Maximum output frequency: 500MHz

• VCO range: 200MHz to 1GHz

The four independent banks of outputs each have their own

output dividers, which allow the device to generate a multitude

of different bank frequency ratios and output-to-input frequency

ratios. The output frequency range is 25MHz to 500MHz and

the input frequency range is 6.25MHz to 125MHz.The PLL_SEL

input can be used to bypass the PLL for test and system debug

purposes. In bypass mode, the input clock is routed around the

PLL and into the internal output dividers.

• Output skew: 70ps (typical)

• Cycle-to-cyle jitter: 35ps (typical)

• LVPECL mode operating voltage supply range:

V_CC= 3.135V to 3.465V, V_EE= 0V

• ECL mode operating voltage supply range:

V_CC= 0V, V_EE= -3.465V to -3.135V

The ICS873991-147 also has a SYNC output which can be

used for system synchronization purposes. It monitors Bank A

and Bank C outputs for coincident rising edges and signals a

pulse per the timing diagrams in this data sheet. This feature is

used primarily in applications where Bank A and Bank C are

running at different frequencies, and is particularly useful when

they are running at non-integer multiples of each other.

• 0°C to 70°C ambient operating temperature

• Available in lead-free (RoHS 6) package

• Industrial temperature available upon request

PIN ASSIGNMENT

Example Applications:

1. Line Card Multiplier: Multiply 19.44MHz from a back-plane

to 77.76MHz on the line card ASIC and Serdes.

39 38 37 36 35 34 33 32 31 30 29 28 27

nQB3 40

2. Zero Delay Buffer: Fan out up to thirteen 100MHz copies

from a reference clock to multiple processing units on an

embedded system.

QC1

QB3 41

nQC1

QC0

V^CCO

nQA0 43

QA0 44

nQC0

V^CCO

QD1

ICS873991-147

52-Lead LQFP

10mm x 10mm x 1.4mm

package body

nQA1 45

QA1 46

nQD1

QD0

nQA2 47

QA2 48

Y package

Top View

nQD0

V^CCO

QFB

nQA3 49

QA3 50

SYNC_SEL 51

VCO_SEL 52

nQFB

V^CCA

7 8 9 10 11 12 13

The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization

and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.

IDT^™/ ICS^™LVPECL/ECL CLOCK GENERATOR

ICS873991AY-147 REV. A AUGUST 10, 2007

12 3 4 5 6 7...17

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ICS873991AY-147LFT 替代型号

型号	品牌	替代类型	描述	数据表
873991AY-147LFT	IDT	功能相似	Low Voltage, LVCMOS/LVPECL-to-LVPECL/ECL Clock Generator
873991AY-147LF	IDT	功能相似	Low Voltage, LVCMOS/LVPECL-to-LVPECL/ECL Clock Generator
ICS873991AY-147LF	IDT	功能相似	LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR

与ICS873991AY-147LFT相关器件

型号	品牌	获取价格	描述	数据表
ICS873991AYLF	IDT	获取价格	PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10
ICS873991AYLFT	IDT	获取价格	PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10
ICS873991AYT	IDT	获取价格	PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10
ICS873995AYLF	IDT	获取价格	PLL Based Clock Driver, 873995 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873995AYLFT	IDT	获取价格	PLL Based Clock Driver, 873995 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AY	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AYLF	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AYT	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873S02BMILF	IDT	获取价格	Low Skew Clock Driver, 873 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X
ICS873S02BMILFT	IDT	获取价格	Low Skew Clock Driver, 873 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X

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