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ICS873991AYLFT PDF预览

ICS873991AYLFT

更新时间: 2024-09-29 14:38:03
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
18页 166K
描述
PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026, LQFP-52

ICS873991AYLFT 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QFP
包装说明:10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026, LQFP-52针数:52
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.54Is Samacsys:N
其他特性:ECL MODE: VCC= 0V WITH VEE = -3.465V TO -3.135V系列:873991
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-PQFP-G52
JESD-609代码:e3长度:10 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER功能数量:1
反相输出次数:端子数量:52
实输出次数:13最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):260
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.25 ns
座面最大高度:1.6 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

ICS873991AYLFT 数据手册

 浏览型号ICS873991AYLFT的Datasheet PDF文件第2页浏览型号ICS873991AYLFT的Datasheet PDF文件第3页浏览型号ICS873991AYLFT的Datasheet PDF文件第4页浏览型号ICS873991AYLFT的Datasheet PDF文件第5页浏览型号ICS873991AYLFT的Datasheet PDF文件第6页浏览型号ICS873991AYLFT的Datasheet PDF文件第7页 
ICS873991  
LOW VOLTAGE, LVCMOS/  
LVPECL-TO-LVPECL/ECL CLOCK GENERATOR  
FEATURES  
GENERAL DESCRIPTION  
14 differential LVPECL outputs  
The ICS873991 is a low voltage, low skew, 3.3V LVPECL  
or ECL Clock Generator. The ICS873991 has two selectable  
Selectable differential LVPECL orTEST_CLK inputs  
clock inputs. The PCLK, nPCLK pair can accept an LVPECL  
input and the TEST_CLK pin can accept a LVCMOS or LVTTL PCLK, nPCLK can accept the following input levels:  
input. This device has a fully integrated PLL along with  
frequency configurable outputs. An external feedback input  
and output regenerates clocks with “zero delay”.  
LVPECL, CML, SSTL  
TEST_CLK accepts the following input levels:  
LVCMOS, LVTTL  
The four independent banks of outputs each have their  
own output dividers, which allow the device to generate a  
multitude of different bank frequency ratios and output-to-  
input frequency ratios. The output frequency range is 25MHz  
to 400MHz and the input frequency range is 6.25MHz to  
125MHz. The PLL_SEL input can be used to bypass the PLL  
for test and system debug purposes. In bypass mode, the input  
clock is routed around the PLL and into the internal output  
dividers.  
Input frequency range: 6.25MHz to 125MHz  
Output frequency: 400MHz (maximum)  
VCO range: 200MHz to 800MHz  
Output skew: 250ps (maximum)  
Cycle-to-cyle jitter: 50ps (typical)  
LVPECL mode operating voltage supply range:  
VCC = 3.135V to 3.465V, VEE = 0V  
The ICS873991 also has a SYNC output which can be used for  
system synchronization purposes. It monitors Bank A and Bank  
C outputs for coincident rising edges and signals a pulse per the  
timing diagrams in this data sheet.This feature is used primarily  
in applications where Bank A and Bank C are running at different  
frequencies, and is particularly useful when they are running at  
non-integer multiples of each other.  
ECL mode operating voltage supply range:  
VCC = 0V, VEE = -3.465V to -3.135V  
0°C to 70°C ambient operating temperature  
Industrial temperature available upon request  
Lead-Free package fully RoHS compliant  
Example Applications:  
1. Line Card Multiplier: Multiply 19.44MHz from a back-plane  
to 77.76MHz on the line card ASIC and Serdes.  
PIN ASSIGNMENT  
2. Zero Delay Buffer: Fan out up to thirteen 100MHz copies  
from a reference clock to multiple processing units on an  
embedded system.  
39 38 37 36 35 34 33 32 31 30 29 28 27  
nQB3  
QB3  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
QC1  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
nQC1  
QC0  
VCCO  
nQA0  
nQC0  
VCCO  
QD1  
QA0  
nQA1  
QA1  
ICS873991  
nQD1  
QD0  
nQA2  
QA2  
nQD0  
VCCO  
QFB  
nQFB  
VCCA  
nQA3  
QA3  
SYNC_SEL  
VCO_SEL  
1
2
3
4
5
6
7
8
9 10 11 12 13  
52-Lead LQFP  
10mm x 10mm x 1.4mm package body  
Y package  
TopView  
873991AY  
www.idt.com  
REV. A JULY 25, 2010  
1

ICS873991AYLFT 替代型号

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873991AYLFT IDT

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