Datasheet > ICS873991AYT

ICS873991AYT

更新时间： 2024-09-29 19:47:51

品牌	Logo	应用领域
艾迪悌 - IDT		驱动逻辑集成电路
页数	文件大小	规格书
17页	171K
描述
PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52

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ICS873991AYT 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52	针数：	52
Reach Compliance Code：	not_compliant	HTS代码：	8542.39.00.01
风险等级：	5.56	其他特性：	ECL MODE: VCC= 0V WITH VEE = -3.465V TO -3.135V
系列：	873991	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQFP-G52	JESD-609代码：	e0
长度：	10 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
湿度敏感等级：	3	功能数量：	1
反相输出次数：		端子数量：	52
实输出次数：	13	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装等效代码：	QFP52,.47SQ
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE
峰值回流温度（摄氏度）：	240	电源：	3.3 V
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.25 ns
座面最大高度：	1.6 mm	子类别：	Clock Drivers
最大供电电压 (Vsup)：	3.465 V	最小供电电压 (Vsup)：	3.135 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn85Pb15)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	20
宽度：	10 mm	Base Number Matches：	1

ICS873991AYT 数据手册

ICS873991

LOW VOLTAGE, LVCMOS/

LVPECL-TO-LVPECL/ECL CLOCK GENERATOR

Integrated

Circuit

Systems, Inc.

FEATURES

GENERAL DESCRIPTION

• 14 differential LVPECL outputs

The ICS873991 is a low voltage, low skew, 3.3V

ICS

LVPECL or ECL Clock Generator and a member of

the HiPerClockS™ family of High Performance

• Selectable differential LVPECL orTEST_CLK inputs

HiPerClockS™

Clock Solutions from ICS. The ICS873991 has two • PCLK, nPCLK can accept the following input levels:

selectable clock inputs.The PCLK, nPCLK pair can

LVPECL, CML, SSTL

accept an LVPECL input and the TEST_CLK pin can accept a

LVCMOS or LVTTL input.This device has a fully integrated PLL

along with frequency configurable outputs. An external feedback

input and output regenerates clocks with “zero delay”.

• TEST_CLK accepts the following input levels:

LVCMOS, LVTTL

• Input frequency range: 6.25MHz to 125MHz

• Output frequency: 400MHz (maximum)

• VCO range: 200MHz to 800MHz

The four independent banks of outputs each have their own out-

put dividers, which allow the device to generate a multitude of

different bank frequency ratios and output-to-input frequency ra-

tios.The output frequency range is 25MHz to 400MHz and the

input frequency range is 6.25MHz to 125MHz.The PLL_SEL in-

put can be used to bypass the PLL for test and system debug

purposes. In bypass mode, the input clock is routed around the

PLL and into the internal output dividers.

• Output skew: 250ps (maximum)

• Cycle-to-cyle jitter: 50ps (typical)

• LVPECL mode operating voltage supply range:

V_CC= 3.135V to 3.465V, V_EE= 0V

• ECL mode operating voltage supply range:

The ICS873991 also has a SYNC output which can be used for

system synchronization purposes. It monitors Bank A and Bank

C outputs for coincident rising edges and signals a pulse per the

timing diagrams in this data sheet.This feature is used primarily

in applications where Bank A and Bank C are running at different

frequencies, and is particularly useful when they are running at

non-integer multiples of each other.

V_CC= 0V, V_EE= -3.465V to -3.135V

• 0°C to 70°C ambient operating temperature

• Industrial temperature available upon request

• Lead-Free package fully RoHS compliant

Example Applications:

PIN ASSIGNMENT

1. Line Card Multiplier: Multiply 19.44MHz from a back-plane

to 77.76MHz on the line card ASIC and Serdes.

2. Zero Delay Buffer: Fan out up to thirteen 100MHz copies

from a reference clock to multiple processing units on an

embedded system.

39 38 37 36 35 34 33 32 31 30 29 28 27

nQB3

QB3

QC1

nQC1

QC0

V^CCO

nQA0

nQC0

V^CCO

QD1

QA0

nQA1

QA1

nQD1

QD0

ICS873991

nQA2

QA2

nQD0

V^CCO

QFB

nQFB

V^CCA

nQA3

QA3

SYNC_SEL

VCO_SEL

7 8 9 10 11 12 13

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y package

TopView

873991AY

www.icst.com/products/hiperclocks.html

REV. A JUNE 13, 2005

12 3 4 5 6 7...17

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与ICS873991AYT相关器件

型号	品牌	获取价格	描述	数据表
ICS873995AYLF	IDT	获取价格	PLL Based Clock Driver, 873995 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873995AYLFT	IDT	获取价格	PLL Based Clock Driver, 873995 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AY	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AYLF	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AYT	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873S02BMILF	IDT	获取价格	Low Skew Clock Driver, 873 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X
ICS873S02BMILFT	IDT	获取价格	Low Skew Clock Driver, 873 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X
ICS874001AGI-02LFT	IDT	获取价格	PLL Based Clock Driver, 874001 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 6.5
ICS874001AGI-02T	IDT	获取价格	PLL Based Clock Driver, 874001 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 6.5
ICS874001AGI-05LF	IDT	获取价格	PCI Expressâ¢ Jitter Attenuator

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