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ICS874001I-05 PDF预览

ICS874001I-05

更新时间: 2024-09-29 11:14:47
品牌 Logo 应用领域
艾迪悌 - IDT 衰减器PC
页数 文件大小 规格书
17页 322K
描述
PCI EXPRESS? JITTER ATTENUATOR

ICS874001I-05 数据手册

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PCI EXPRESS™ JITTER ATTENUATOR  
ICS874001I-05  
GENERAL DESCRIPTION  
FEATURES  
The ICS874001I-05 is a high performance Jitter  
One differential LVDS output pair  
ICS  
HiPerClockS™  
Attenuator designed for use in PCI Express™ sys-  
tems. In some PCI Express systems, such as those  
found in desktop PCs, the PCI Express clocks are  
generated from a low bandwidth, high phase noise  
PLL frequency synthesizer. In these systems, a jitter  
One differential clock input  
CLK and nCLK supports the following input types:  
LVPECL, LVDS, LVHSTL, SSTL, HCSL  
Output frequency range: 98MHz - 640MHz  
Input frequency range: 98MHz - 128MHz  
VCO range: 490MHz - 640MHz  
attenuator may be required to attenuate high frequency random  
and deterministic jitter components from the PLL synthesizer  
and from the system board. The ICS874001I-05 has a bandwidth  
of 6MHz with <1dB peaking, easily meeting PCI Express Gen2  
PLL requirements.  
Cycle-to-cycle jitter: 50ps (maximum)  
3.3V operating supply  
The ICS874001I-05 uses IDT’s 3rd Generation FemtoClockTM  
PLL technology to achive the lowest possible phase noise.  
The device is packaged in a small 20-pin TSSOP package,  
making it ideal for use in space constrained applications such as  
PCI Express add-in cards.  
• PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
PIN ASSIGNMENT  
nc  
PLL_SEL  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
nc  
nc  
nc  
VDDO  
Q
nQ  
nc  
nc  
GND  
nCLK  
CLK  
OE  
MR  
nc  
F_SEL1  
VDDA  
F_SEL0  
VDD  
ICS874001I-05  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.925mm package body  
G Package  
Top View  
IDT/ ICSPCI EXPRESS JITTERATTENUATOR  
1
ICS874001AGI-05 REV. A APRIL 20, 2009  

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