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ICS874003AGI-02LF PDF预览

ICS874003AGI-02LF

更新时间: 2024-09-29 21:11:31
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
15页 367K
描述
PLL Based Clock Driver, 874003 Series, 3 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20

ICS874003AGI-02LF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.17
系列:874003输入调节:DIFFERENTIAL
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:6.5 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:20
实输出次数:3最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.145 ns
座面最大高度:1.2 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
最小 fmax:98 MHzBase Number Matches:1

ICS874003AGI-02LF 数据手册

 浏览型号ICS874003AGI-02LF的Datasheet PDF文件第2页浏览型号ICS874003AGI-02LF的Datasheet PDF文件第3页浏览型号ICS874003AGI-02LF的Datasheet PDF文件第4页浏览型号ICS874003AGI-02LF的Datasheet PDF文件第5页浏览型号ICS874003AGI-02LF的Datasheet PDF文件第6页浏览型号ICS874003AGI-02LF的Datasheet PDF文件第7页 
PCI EXPRESS™ JITTER ATTENUATOR  
ICS874003I-02  
GENERAL DESCRIPTION  
FEATURES  
Three Differential LVDS output pairs  
The ICS874003I-02 is a high performance Dif-ferential-to-LVDS  
Jitter Attenuator designed for use in PCI Express systems. In  
some PCI Express systems, such as those found in desktop  
PCs, the PCI Express clocks are generated from a low  
bandwidth, high phase noise PLL frequency synthesizer. In these  
systems, a jitter attenuator may be required to attenuate high  
frequency random and deterministic jitter components from the  
PLL synthesizer and from the system board. The ICS874003I-  
02 has a bandwidth of 400kHz. The 400kHz provides an  
intermediate bandwidth that can easily track triangular spread  
profiles, while providing good jitter attenuation.  
One Differential clock input  
CLK and nCLK supports the following input types:  
LVPECL, LVDS, LVHSTL, SSTL, HCSL  
Output frequency range: 98MHz - 320MHz  
Input frequency range: 98MHz - 128MHz  
VCO range: 490MHz - 640MHz  
Cycle-to-cycle jitter: 35ps (maximum)  
Supports PCI-Express Spread-Spectrum Clocking  
The ICS874003I-02 uses IDT’s 3rd Generation FemtoClockTM  
PLL technology to achive the lowest possible phase noise.  
The device is packaged in a 20 Lead TSSOP package, making  
it ideal for use in space constrained applications such as PCI  
Express add-in cards.  
The 400kHz bandwidth mode allows the system designer to  
make jitter attenuation/tracking skew design trade-offs  
3.3V operating supply  
-40°C to 85°C ambient operating temperature  
Lead-free (RoHS 6) packaging  
F_SEL[2:0] FUNCTION TABLE  
Inputs  
F_SEL2 F_SEL1 F_SEL0  
Outputs  
QA0, nQA0:QA1, nQA1  
QB0, nQB0  
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
÷2  
÷5  
÷4  
÷2  
÷2  
÷5  
÷4  
÷4  
÷2  
÷2  
÷2  
÷4  
÷5  
÷4  
÷5  
÷4  
BLOCK DIAGRAM  
Pullup  
OEA  
3
PIN ASSIGNMENT  
Pulldown  
F_SEL2:0  
QA0  
QA1  
VDDO  
QA0  
1
2
20 nQA1  
÷5  
÷4  
19  
VDDO  
3
4
18  
17  
QB0  
nQB0  
nQA0  
QA1  
÷2 (default)  
nQA0  
MR  
F_SEL0  
nc  
5
6
7
8
9
16 F_SEL2  
15  
14  
13  
OEB  
GND  
nCLK  
Pulldown  
Pullup  
CLK  
Phase  
Detector  
VCO  
VDDA  
F_SEL1  
nQA1  
490 - 640MHz  
nCLK  
12 CLK  
11  
OEA  
3
VDD 10  
QB0  
ICS874003I-02  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.92mm  
package body  
÷5  
÷4  
÷2 (default)  
nQB0  
M = ÷5 (fixed)  
G Package  
Pulldown  
MR  
Top View  
IDT/ ICSPCI EXPRESS™ JITTER ATTENUATOR  
1
ICS874003AGI-02 REV A MAY 1, 2013  

ICS874003AGI-02LF 替代型号

型号 品牌 替代类型 描述 数据表
874003AG-02LF IDT

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